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PDF ADS823 Data sheet ( Hoja de datos )

Número de pieza ADS823
Descripción 10-Bit/ 60MHz Sampling ANALOG-TO-DIGITAL CONVERTER
Fabricantes Burr-Brown Corporation 
Logotipo Burr-Brown Corporation Logotipo



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No Preview Available ! ADS823 Hoja de datos, Descripción, Manual

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ADS823
ADS823
ADS826
ADS826
SBAS070B – OCTOBER 1995 – REVISED AUGUST 2002
10-Bit, 60MHz Sampling
ANALOG-TO-DIGITAL CONVERTER
FEATURES
q HIGH SNR: 60dB
q HIGH SFDR: 74dBFS
q LOW POWER: 265mW
q INTERNAL/EXTERNAL REFERENCE OPTION
q SINGLE-ENDED OR
DIFFERENTIAL ANALOG INPUT
q PROGRAMMABLE INPUT RANGE
q LOW DNL: 0.25LSB
q SINGLE +5V SUPPLY OPERATION
q +3V/+5V LOGIC I/O COMPATIBLE (ADS826)
q POWER DOWN: 20mW
q SSOP-28 PACKAGE
APPLICATIONS
q MEDICAL IMAGING
q COMMUNICATIONS
q CCD IMAGING
q VIDEO DIGITIZING
q TEST EQUIPMENT
DESCRIPTION
The ADS823 and ADS826 are pipeline, CMOS Analog-to-
Digital Converters (ADCs) that operate from a single +5V
power supply. These converters provide excellent perfor-
mance with a single-ended input and can be operated with a
differential input for added spurious performance. These
high-performance converters include a 10-bit quantizer, high-
bandwidth track-and-hold, and a high-accuracy internal ref-
erence. They also allow for disabling the internal reference
and utilizing external references. This external reference
option provides excellent gain and offset matching when
used in multi-channel applications or in applications where
full-scale range adjustment is required.
The ADS823 and ADS826 employ digital error correction
techniques to provide excellent differential linearity for de-
manding imaging applications. Their low distortion and high
SNR give the extra margin needed for medical imaging,
communications, video, and test instrumentation. The ADS823
and ADS826 offer power dissipation of 265mW and also
provide a power-down mode, thus reducing power dissipa-
tion to only 20mW.
The ADS823 and ADS826 are specified at a maximum
sampling frequency of 60MHz and a single-ended input
range of 1.5V to 3.5V. The ADS823 and ADS826 are avail-
able in an SSOP-28 package and are pin-compatible with the
10-bit, 40MHz ADS822 and ADS825, and the 10-bit, 75MHz
ADS828.
+VS
ADS823
ADS826
CLK
Timing
Circuitry
VDRV
VIN IN
IN T/H
10-Bit
Pipelined
A/D Core
Error
Correction
Logic
3-State
Outputs
D0
•••
D9
CM Internal
Reference
Optional External
Reference
Int/Ext
PD OE
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
www.ti.com
Copyright © 1995, Texas Instruments Incorporated

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ADS823 pdf
TYPICAL CHARACTERISTICS
At TA = full specified temperature range, VS = +5V single-ended input range = 1.5V to 3.5V, sampling rate = 60MHz, external reference, unless otherwise noted.
0
20
40
60
80
100
0
SPECTRAL PERFORMANCE
fIN = 1MHz
SNR = 60dBFS
SFDR = 77dBFS
7.5 15 22.5
Frequency (MHz)
30
0
20
40
60
80
100
0
SPECTRAL PERFORMANCE
fIN = 10MHz
SNR = 60dBFS
SFDR = 76dBFS
7.5 15 22.5
Frequency (MHz)
30
0
20
40
60
80
100
0
SPECTRAL PERFORMANCE
(Single-Ended, 1Vp-p)
fIN = 10MHz
SNR = 56.6dBFS
SFDR = 74dBFS
7.5 15 22.5
Frequency (MHz)
30
0
20
40
60
80
100
0
SPECTRAL PERFORMANCE
(Differential Input, 2Vp-p)
fIN = 20MHz
SNR = 60.4dBFS
SFDR = 72dBFS
7.5 15 22.5
Frequency (MHz)
30
0
20
40
60
80
100
0
SPECTRAL PERFORMANCE
(Differential Input, 2Vp-p)
fIN = 10MHz
SNR = 60dBFS
SFDR = 73dBFS
7.5 15 22.5
Frequency (MHz)
30
0
20
40
60
80
100
0
SPECTRAL PERFORMANCE
fIN = 20MHz
SNR = 58.7dBFS
SFDR = 70dBFS
7.5 15 22.5
Frequency (MHz)
30
ADS823, ADS826
SBAS070B
www.ti.com
5

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ADS823 arduino
resistive reference ladder. The bandgap reference circuit
includes logic functions that allow to set the analog input
swing of the ADS823 and ADS826 to either a 1Vp-p or
2Vp-p full-scale range simply by tying the RSEL pin to a LOW
or HIGH potential, respectively. While operating the ADS823
and ADS826 in the external reference mode, the buffer
amplifiers for the REFT and REFB are disconnected from the
reference ladder.
As shown, the ADS823 and ADS826 have internal 50kpull-
up resistors at the range select pin (RSEL) and reference
select pin (INT/EXT). Leaving those pins open configures the
ADS823 for a 2Vp-p input range and external reference
operation. Setting the ADS823 up for internal reference
mode requires bringing the INT/EXT pin LOW.
The reference buffers can be utilized to supply up to 1mA
(sink and source) to external circuitry. The resistor ladders of
the ADS823 and ADS826 are divided into several segments
and have two additional nodes, ByT and ByB, which are
brought out for external bypassing only (See Figure 6). To
ensure proper operation with any reference configurations, it
is necessary to provide solid bypassing at all reference pins
in order to keep the clock feedthrough to a minimum. All
bypassing capacitors should be located as close to their
respective pins as possible.
The common-mode voltage available at the CM pin may be
used as a bias voltage to provide the appropriate offset for
the driving circuitry. However, care must be taken not to
appreciably load this node, which is not buffered and has a
high impedance. An alternative way of generating a com-
mon-mode voltage is given in Figure 7. Here, two external
precision resistors (tolerance 1% or better) are located
between the top and bottom reference pins. The common-
mode voltage, VCM, will appear at the midpoint.
EXTERNAL REFERENCE OPERATION
For even more design flexibility, the internal reference can be
disabled and an external reference voltage be used. The
utilization of an external reference may be considered for
applications requiring higher accuracy, improved tempera-
ture performance, or a wide adjustment range of the
converters full-scale range. Especially in multichannel
applications, the use of a common external reference has the
benefit of obtaining better matching of the full-scale range
between converters.
The external references can vary as long as the value of the
external top reference REFTEXT stays within the range of
(VS 1.25V) and (REFB + 0.8V), and the external bottom
reference REFBEXT stays within 1.25V and (REFT 0.8V), as
shown in Figure 8.
REFT
+3.5V
R1
1.6k
ADS823
ADS826
R2
1.6k
REFB
+1.5V
0.1µF
VCM
+2.5V
0.1µF
FIGURE 7. Alternative Circuit to Generate CM Voltage.
DIGITAL INPUTS AND OUTPUTS
Clock Input Requirements
Clock jitter is critical to the SNR performance of high-speed,
high-resolution ADCs. Clock jitter leads to aperture jitter (tA),
which adds noise to the signal being converted. The ADS823
and ADS826 samples the input signal on the rising edge of the
CLK input. Therefore, this edge should have the lowest pos-
sible jitter. The jitter noise contribution to total SNR is given by
A - Short for 1Vp-p Input Range
B - Short for 2Vp-p Input Range (Default)
+5V
BA
VIN
VCM
+2.5VDC
+VS INT/EXT
RSEL
IN
ADS823
ADS826
IN
GND
REFT
ByT
GND
ByB REFB
External Top Reference
REFT = REFB +0.8V to +3.75V
4 x 0.1µF
FIGURE 8. Configuration Example for External Reference Operation.
ADS823, ADS826
SBAS070B
www.ti.com
External Bottom Reference
REFB = REFT 0.8V to +1.25V
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