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PDF ADS821 Data sheet ( Hoja de datos )
| Número de pieza | ADS821 | |
| Descripción | 10-Bit/ 40MHz Sampling ANALOG-TO-DIGITAL CONVERTER | |
| Fabricantes | Burr-Brown Corporation | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de ADS821 (archivo pdf) en la parte inferior de esta página. Total 15 Páginas | ||
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®
ADS821U
ADS821E
ADS821
TM 10-Bit, 40MHz Sampling
ANALOG-TO-DIGITAL CONVERTER
FEATURES
q NO MISSING CODES
q INTERNAL REFERENCE
q LOW POWER: 380mW
q HIGH SNR: 58dB
q INTERNAL TRACK/HOLD
q PACKAGE: 28-Pin SOIC and SSOP
APPLICATIONS
q VIDEO DIGITIZING
q ULTRASOUND IMAGING
q GAMMA CAMERAS
q SET-TOP BOXES
q CABLE MODEMS
q CCD IMAGING
Color Copiers
Scanners
Camcorders
Security Cameras
Fax Machines
q IF AND BASEBAND DIGITIZATION
q TEST INSTRUMENTATION
IN
IN
REFT
CM
REFB
DESCRIPTION
The ADS821 is a low power, monolithic 10-bit, 40MHz
analog-to-digital converter utilizing a small geometry
CMOS process. This COMPLETE converter includes
a 10-bit quantizer with internal track/hold, reference,
and a power down feature. It operates from a single
+5V power supply and can be configured to accept
either differential or single-ended input signals.
The ADS821 employs digital error correction to pro-
vide excellent Nyquist differential linearity perfor-
mance for demanding imaging applications. Its low
distortion, high SNR and high oversampling capability
give it the extra margin needed for telecommunications
and video applications.
This high performance converter is specified for AC
and DC performance at a 40MHz sampling rate. The
ADS821 is available in 28-pin SOIC and SSOP
packages.
CLK
MSBI
OE
Timing
Circuitry
T/H
+3.25V
Pipeline
A/D
Error
Correction
Logic
3-State
Outputs
10-Bit
Digital
Data
+1.25V
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111
Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
©1995 Burr-Brown Corporation
PDS-1291D
Printed in U.S.A. November, 1996
1 page  
TYPICAL PERFORMANCE CURVES
At TA = +25°C, VS = +5V, Sampling Rate = 40MHz, with a 50% duty cycle clock having a 2ns rise/fall time, unless otherwise noted.
0
–20
–40
–60
–80
–100
–120
0
SPECTRAL PERFORMANCE
fIN = 500kHz
5 10 15
Frequency (MHz)
20
0
–20
–40
–60
–80
–100
–120
0
SPECTRAL PERFORMANCE
fIN = 5MHz
5 10 15
Frequency (MHz)
20
0
–20
–40
–60
–80
–100
–120
0
SPECTRAL PERFORMANCE
fIN = 12MHz
5 10 15
Frequency (MHz)
20
0
–20
–40
–60
–80
–100
–120
0
SPECTRAL PERFORMANCE
fIN = 1MHz
fS = 10MHz
1.0 2.0 3.0 4.0
Frequency (MHz)
5.0
2.0
1.0
0
–1.0
–2.0
0
DIFFERENTIAL LINEARITY ERROR
fIN = 500kHz
256 512 768 1024
Code
2.0
1.0
0
–1.0
–2.0
0
DIFFERENTIAL LINEARITY ERROR
fIN = 12MHz
256 512 768 1024
Code
®
5 ADS821
5 Page 
APPLICATIONS
DRIVING THE ADS821
The ADS821 has a differential input with a common-mode
of +2.25V. For AC-coupled applications, the simplest way
to create this differential input is to drive the primary
winding of a transformer with a single-ended input. A
differential output is created on the secondary if the center
tap is tied to the common-mode voltage (CM) of +2.25V per
Figure 5. This transformer-coupled input arrangement pro-
vides good high frequency AC performance. It is important
to select a transformer that gives low distortion and does not
exhibit core saturation at full scale voltage levels. Since the
transformer does not appreciably load the ladder, there is no
need to buffer the common-mode (CM) output in this in-
stance. In general, it is advisable to keep the current draw
from the CM output pin below 0.5µA to avoid nonlinearity
in the internal reference ladder. A FET input operational
amplifier such as the OPA130 can provide a buffered refer-
ence for driving external circuitry. The analog IN and IN
inputs should be bypassed with 22pF capacitors to minimize
track/hold glitches and to improve high input frequency
performance.
Figure 6 shows an AC-coupled single-ended input interface
circuit using the low cost, current feedback OPA658 as the
active gain stage. When testing this configuration in gains of
+4, +5.8 and +8.2, it was noted that reducing the feedback
AC Input
Signal
22 CM
0.1µF
26 IN
ADS821
22pF
Mini-Circuits
T T1-6-KK81
or equivalent
27 IN
22pF
FIGURE 5. AC-Coupled Single-Ended to Differential Drive
Circuit Using a Transformer.
resistor of the OPA658 from the typical 402Ω to 360Ω
resulted in a wider bandwidth, thus improving distortion at
higher gains. The gain resistor was scaled to 120Ω, 75Ω and
50Ω for each of the three gain settings. The two 330Ω
resistors set the RC time constant and the values can be
varied, although higher values will have the effect of moving
the corner frequency of the created high-pass filter down. In
Figure 6, the –3dB point is set at 4.2kHz.
Figure 7 illustrates another possible low cost interface circuit
which utilizes resistors and capacitors in place of a trans-
former. Depending on the signal bandwidth, the component
values should be carefully selected in order to maintain the
performance outlined in the data sheet. The input capacitors,
CIN, and the input resistors, RIN, create a high-pass filter with
the lower corner frequency at fC = 1/(2πRINCIN). The corner
frequency can be reduced by either increasing the value of
RIN or CIN. If the circuit operates with a 50Ω or 75Ω
impedance level, the resistors are fixed and only the value of
the capacitor can be increased. Usually AC-coupling capaci-
tors are electrolytic or tantalum capacitors with values of
1µF or higher. It should be noted that these large capacitors
become inductive with increased input frequency, which
could lead to signal amplitude errors or oscillation. To
maintain a low AC-coupling impedance throughout the sig-
nal band, a small value (e.g. 1µF) ceramic capacitor could be
added in parallel with the polarized capacitor.
Capacitors CSH1 and CSH2 are used to minimize current
glitches resulting from the switching in the input track and
hold stage and to improve signal-to-noise performance. These
capacitors can also be used to establish a low-pass filter and
effectively reduce the noise bandwidth. In order to create a
real pole, resistors RSER1 and RSER2 were added in series with
each input. The cut-off frequency of the filter is determined
by fC = 1/(2πRSER•(CSH+CADC)) where RSER is the resistor in
series with the input, CSH is the external capacitor from the
input to ground, and CADC is the internal input capacitance of
the A/D converter (typically 4pF).
Resistors R1 and R2 are used to derive the necessary common
mode voltage from the buffered top and bottom references.
+5V –5V
0.1 || 2.2
0.1 || 2.2
VIN
OPA658
49.9Ω
A1
0.1µF
330Ω
360Ω
RG
330Ω
FIGURE 6. Low-Cost AC-Coupled Single-Ended Input Circuit.
11
IN
22pF
0.1µF
26
ADS821
27
22
IN CM
+2.25V
0.1µF
I/O
ADS821
®
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet ADS821.PDF ] | |
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