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PDF ADS7843 Data sheet ( Hoja de datos )
| Número de pieza | ADS7843 | |
| Descripción | TOUCH SCREEN CONTROLLER | |
| Fabricantes | Burr-Brown Corporation | |
| Logotipo |  |
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® ADS7843
TOUCH SCREEN CONTROLLER
FEATURES
q 4-WIRE TOUCH SCREEN INTERFACE
q RATIOMETRIC CONVERSION
q SINGLE SUPPLY: 2.7V to 5V
q UP TO 125kHz CONVERSION RATE
q SERIAL INTERFACE
q PROGRAMMABLE 8- OR 12-BIT RESOLUTION
q 2 AUXILIARY ANALOG INPUTS
q FULL POWER-DOWN CONTROL
APPLICATIONS
q PERSONAL DIGITAL ASSISTANTS
q PORTABLE INSTRUMENTS
q POINT-OF-SALES TERMINALS
q PAGERS
q TOUCH-SCREEN MONITORS
DESCRIPTION
The ADS7843 is a 12-bit sampling analog-to-digital
converter (ADC) with a synchronous serial interface
and low on-resistance switches for driving touch
screens. Typical power dissipation is 750µW at a
125kHz throughput rate and a +2.7V supply. The
reference voltage (V ) can be varied between 1V and
REF
+VCC, providing a corresponding input voltage range
of 0V to VREF. The device includes a shutdown mode
which reduces typical power dissipation to under
0.5µW. The ADS7843 is guaranteed down to 2.7V
operation.
Low power, high speed, and on-board switches make
the ADS7843 ideal for battery operated systems such
as personal digital assistants with resistive touch screens
and other portable equipment. The ADS7843 is avail-
able in a 16-lead SSOP package and is guaranteed
over the –40°C to +85°C temperature range.
PENIRQ
+VCC
X+
X–
Y+
Y–
IN3
IN4
VREF
Four
Channel
Multiplexer
SAR
CDAC
Comparator
Serial
Interface
and
Control
DCLK
CS
DIN
DOUT
BUSY
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111
Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
©1997 Burr-Brown Corporation
PDS-1441C
Printed in U.S.A. June, 1998
1 page  
TYPICAL PERFORMANCE CURVES (CONT)
At TA = +25°C, +VCC = +2.7V, VREF = +2.5V, fSAMPLE = 125kHz, and fCLK = 16 • fSAMPLE = 2MHz, unless otherwise noted.
14
12
10
8
6
4
2
0
0
REFERENCE CURRENT vs SAMPLE RATE
25 50 75 100
Sample Rate (kHz)
125
REFERENCE CURRENT vs TEMPERATURE
18
16
14
12
10
8
6
–40
–20
0 20 40 60
Temperature (˚C)
80 100
SWITCH ON RESISTANCE vs +VCC
(X+, Y+: +VCC to Pin; X–, Y–: Pin to GND)
8
7
6
Y–
5
X–
4
Y+ X+
3
2
1
2 2.5 3 3.5 4 4.5 5
+VCC (V)
SWITCH ON RESISTANCE vs TEMPERATURE
(X+, Y+: +VCC to Pin; X–, Y–: Pin to GND)
8
7
X– Y–
6
5
X+ Y+
4
3
2
1
–40
–20
0 20 40 60
Temperature (˚C)
80 100
2
1.8
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
0
20
MAXIMUM SAMPLING RATE vs RIN
INL: R = 2k
INL: R = 500
DNL: R = 2k
DNL: R = 500
40 60 80 100 120 140 160 180 200
Sampling Rate (kHz)
®
5 ADS7843
5 Page 
Data Format
The ADS7843 output data is in Straight Binary format as
shown in Figure 9. This figure shows the ideal output code
for the given input voltage and does not include the effects
of offset, gain, or noise.
11...111
11...110
11...101
FS = Full-Scale Voltage = VREF(1)
1 LSB = VREF(1)/4096
1 LSB
Figure 10 shows the difference between reducing the DCLK
frequency (“scaling” DCLK to match the conversion rate) or
maintaining DCLK at the highest frequency and reducing
the number of conversions per second. In the later case, the
converter spends an increasing percentage of its time in
power-down mode (assuming the auto power-down mode is
active).
1000
fCLK = 16 · fSAMPLE
100
00...010
00...001
00...000
0V FS – 1 LSB
Input Voltage(2) (V)
NOTES: (1) Reference voltage at converter: +REF–(–REF). See Figure 2.
(2) Input voltage at converter, after multiplexer: +IN–(–IN). See Figure 2
FIGURE 9. Ideal Input Voltages and Output Codes.
10
1
1k
fCLK = 2MHz
TA = 25˚C
+VCC = +2.7V
10k 100k
fSAMPLE (Hz)
1M
FIGURE 10. Supply Current vs Directly Scaling the Fre-
quency of DCLK with Sample Rate or Keeping
DCLK at the Maximum Possible Frequency.
8-Bit Conversion
The ADS7843 provides an 8-bit conversion mode that can
be used when faster throughput is needed and the digital
result is not as critical. By switching to the 8-bit mode, a
conversion is complete four clock cycles earlier. This could
be used in conjunction with serial interfaces that provide 12-
bit transfers or two conversions could be accomplished with
three 8-bit transfers. Not only does this shorten each conver-
sion by four bits (25% faster throughput), but each conver-
sion can actually occur at a faster clock rate. This is because
the internal settling time of the ADS7843 is not as critical—
settling to better than 8 bits is all that is needed. The clock
rate can be as much as 50% faster. The faster clock rate and
fewer clock cycles combine to provide a 2x increase in
conversion rate.
POWER DISSIPATION
There are two major power modes for the ADS7843: full power
(PD1 - PD0 = 11B) and auto power-down (PD1 - PD0 = 00B).
When operating at full speed and 16-clocks per conversion (as
shown in Figure 6), the ADS7843 spends most of its time
acquiring or converting. There is little time for auto power-
down, assuming that this mode is active. Therefore, the differ-
ence between full power mode and auto power-down is negli-
gible. If the conversion rate is decreased by simply slowing the
frequency of the DCLK input, the two modes remain approxi-
mately equal. However, if the DCLK frequency is kept at the
maximum rate during a conversion but conversions are simply
done less often, the difference between the two modes is
dramatic.
Another important consideration for power dissipation is the
reference mode of the converter. In the single-ended refer-
ence mode, the converter’s internal switches are on only
when the analog input voltage is being acquired (see Figure
5). Thus, the external device, such as a resistive touch
screen, is only powered during the acquisition period. In the
differential reference mode, the external device must be
powered throughout the acquisition and conversion periods
(see Figure 5). If the conversion rate is high, this could
substantially increase power dissipation.
LAYOUT
The following layout suggestions should provide the most
optimum performance from the ADS7843. However, many
portable applications have conflicting requirements con-
cerning power, cost, size, and weight. In general, most
portable devices have fairly “clean” power and grounds
because most of the internal components are very low
power. This situation would mean less bypassing for the
converter’s power and less concern regarding grounding.
Still, each situation is unique and the following suggestions
should be reviewed carefully.
For optimum performance, care should be taken with the
physical layout of the ADS7843 circuitry. The basic SAR
architecture is sensitive to glitches or sudden changes on the
power supply, reference, ground connections, and digital
inputs that occur just prior to latching the output of the
analog comparator. Thus, during any single conversion for
an ‘n-bit’ SAR converter, there are n ‘windows’ in which
®
11 ADS7843
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet ADS7843.PDF ] | |
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