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PDF ADS774KU Data sheet ( Hoja de datos )

Número de pieza ADS774KU
Descripción Microprocessor-Compatible Sampling CMOS ANALOG-to-DIGITAL CONVERTER
Fabricantes Burr-Brown Corporation 
Logotipo Burr-Brown Corporation Logotipo



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® ADS774
ADS774
ADS774
ADS774
Microprocessor-Compatible Sampling
CMOS ANALOG-to-DIGITAL CONVERTER
FEATURES
q REPLACES ADC574, ADC674 AND ADC774
FOR NEW DESIGNS
q COMPLETE SAMPLING A/D WITH
REFERENCE, CLOCK AND
MICROPROCESSOR INTERFACE
q FAST ACQUISITION AND CONVERSION:
8.5µs max OVER TEMPERATURE
q ELIMINATES EXTERNAL SAMPLE/HOLD
IN MOST APPLICATIONS
q GUARANTEED AC AND DC PERFOR-
MANCE
q SINGLE +5V SUPPLY OPERATION
q LOW POWER: 120mW max
q PACKAGE OPTIONS: 0.6" and 0.3" DIPs,
SOIC
DESCRIPTION
The ADS774 is a 12-bit successive approximation
analog-to-digital converter using an innovative
capacitor array (CDAC) implemented in low-power
CMOS technology. This is a drop-in replacement for
ADC574, ADC674, and ADC774 models in most
applications, with internal sampling, much lower power
consumption, and the ability to operate from a single
+5V supply.
The ADS774 is complete with internal clock, micro-
processor interface, three-state outputs, and internal
scaling resistors for input ranges of 0V to +10V, 0V to
+20V, ±5V, or ±10V. The maximum throughput time
is 8.5µs over the full operating temperature range,
including both acquisition and conversion.
Complete user control over the internal sampling func-
tion facilitates elimination of external sample/hold
amplifiers in most existing designs.
The ADS774 requires +5V, with –15V optional. No
+15V supply is required. Available packages include
0.3" or 0.6" wide 28-pin plastic DIP and 28-pin SOICs.
Control
Inputs
Bipolar Offset
20V Range
10V Range
2.5V Reference
Input
2.5V Reference
Output
CDAC
Control Logic
Clock
+
Comparator
Successive
Approximation
Register
2.5V
Reference
Status
Parallel
Data
Output
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111
Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
© 1991 Burr-Brown Corporation
PDS-1109F
Printed in U.S.A. July, 1995

1 page




ADS774KU pdf
TYPICAL PERFORMANCE CURVES
At TA = +25°C, VDD = VEE = +5V; Bipolar ±10V Input Range; sampling frequency of 110kHz; unless otherwise specified. All plots use 4096 point FFTs.
0
–20
–40
–60
–80
–100
–120
0
FREQUENCY SPECTRUM (±10V, 2kHz Input)
S/(N + D) = 72.6dB
THD = –93.5dB
SNR = 72.6dB
10 20 30 40
Input Frequency (kHz)
50 55
SIGNAL/(NOISE + DISTORTION) vs
INPUT FREQUENCY AND AMBIENT TEMPERATURE
75
–55°C
70
+25°C
+125°C
65
0.1
1 10
Input Frequency (kHz)
100
FREQUENCY SPECTRUM (±10V, 20kHz Input)
0
S/(N + D) = 70.6dB
–20 THD = –77.5dB
SNR = 71.5dB
–40
–60
–80
–100
–120
0
10 20 30 40
Input Frequency (kHz)
50 55
0
–20
–40
–60
–80
–100
–120
0
FREQUENCY SPECTRUM (±1V, 20kHz Input)
S/(N + D) = 53.1dB
THD = –74.2dB
SNR = 53.1dB
10 20 30 40
Input Frequency (kHz)
50 55
SPURIOUS FREE DYNAMIC RANGE, SNR AND THD
vs INPUT FREQUENCY
100 Spurious Free Dynamic Range
90
Total Harmonic Distortion (THD)
80
Signal-to-Noise Ratio (SNR)
70
60
0.1
1 10
Input Frequency (kHz)
100
POWER SUPPLY REJECTION
vs SUPPLY RIPPLE FREQUENCY
80
60
40
20
10
10
100 1k 10k 100k 1M
Supply Ripple Frequency (Hz)
10M
®
5 ADS774

5 Page





ADS774KU arduino
INSTALLATION
LAYOUT PRECAUTIONS
Analog (pin 9) and digital (pin 15) commons are not con-
nected together internally in the ADS774, but should be
connected together as close to the unit as possible and to an
analog common ground plane beneath the converter on the
component side of the board. In addition, a wide conductor
pattern should run directly from pin 9 to the analog supply
common, and a separate wide conductor pattern from pin 15
to the digital supply common.
If the single-point system common cannot be established
directly at the converter, pin 9 and pin 15 should still be
connected together at the converter. A single wide conductor
pattern then connects these two pins to the system common.
In either case, the common return of the analog input signal
should be referenced to pin 9 of the ADC. This prevents any
voltage drops that might occur in the power supply common
returns from appearing in series with the input signal.
The speed of the ADS774 requires special caution regarding
whichever input pin is unused. For 10V input ranges, pin 14
(20V Range) must be unconnected, and for 20V input
ranges, pin 13 (10V Range) must be unconnected. In both
cases, the unconnected input should be shielded with ground
plane to reduce noise pickup.
In particular, the unused input pin should not be connected
to any capacitive load, including high impedance switches.
Even a few pF on the unused pin can degrade acquisition
time.
Coupling between analog input and digital lines should be
minimized by careful layout. For instance, if the lines must
cross, they should do so at right angles. Parallel analog and
digital lines should be separated from each other by a pattern
connected to common.
If external full scale and offset potentiometers are used, the
potentiometers and associated resistors should be as close as
possible to the ADS774.
POWER SUPPLY DECOUPLING
On the ADS774, +5V (to Pin 1) is the only power supply
required for correct operation. Pin 7 is not connected inter-
nally, so there is no problem in existing ADC774 sockets
where this is connected to +15V. Pin 11 (VEE) is only used
as a logic input to select modes of control over the sampling
function as described above. When used in an existing
ADC774 socket, the –15V on pin 11 selects the ADC774
Emulation Mode. Since pin 11 is used as a logic input, it is
immune to typical supply variations.
SYMBOL
tAQ + tC
tC
tAQ
tAP
tJ
PARAMETER
Throughput Time:
12-bit Conversions
8-bit Conversions
Conversion Time:
12-bit Conversions
8-bit Conversions
Acquisition Time
Aperture Delay
Aperture Uncertainty
S/H CONTROL MODE
(Pin 11 Connected to +5V)
MIN
TYP
MAX
8 8.5
6 6.3
6.4
4.4
1.4
20
0.3
TABLE VI. Conversion Timing, TMIN to TMAX.
ADC774 EMULATION MODE
(Pin 11 Connected to 0V to –15V)
MIN TYP
MAX
8 8.5
6 6.3
6.4
4.4
1.4
1600
10
UNITS
µs
µs
µs
µs
µs
ns
ns
R/C
S/H Control Mode
Pin 11 connected to +5V.
ADC774 Emulation Mode*
Pin 11 connected to VEE or ground.
Signal
Acquisition
tC
tAP
Conversion
tAQ
Signal
Acquisition
tAP
tC
Conversion
tAQ
Signal
Acquisition
Signal
Acquisition
*In the ADC774 Emulation Mode, a convert command triggers a delay that
allows the ADS774 enough time to acquire the input signal before converting.
FIGURE 9. Signal Acquisition and Conversion Timing.
11 ADS774
®

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