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BC856AW Datasheet دیتاشیت PDF دانلود

دیتاشیت - Diotec Semiconductor - Surface mount Si-Epitaxial PlanarTransistors

شماره قطعه BC856AW
شرح مفصل Surface mount Si-Epitaxial PlanarTransistors
تولید کننده Diotec Semiconductor 
آرم Diotec Semiconductor 


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BC856AW شرح
BC 856W ... BC 860W
General Purpose Transistors
PNP
Surface mount Si-Epitaxial PlanarTransistors
Si-Epitaxial PlanarTransistoren für die Oberflächenmontage
PNP
2±0.1
0.3 3
Type
Code
12
1.3
1±0.1
Dimensions / Maße in mm
1=B 2=E 3=C
Power dissipation – Verlustleistung
Plastic case
Kunststoffgehäuse
Weight approx. – Gewicht ca.
Plastic material has UL classification 94V-0
Gehäusematerial UL94V-0 klassifiziert
Standard packaging taped and reeled
Standard Lieferform gegurtet auf Rolle
200 mW
SOT-323
0.01 g
Maximum ratings (TA = 25/C)
Collector-Emitter-voltage
B open
Collector-Base-voltage
E open
Emitter-Base-voltage
C open
Power dissipation – Verlustleistung
Collector current – Kollektorstrom (DC)
Peak Collector current – Kollektor-Spitzenstrom
Peak Base current – Basis-Spitzenstrom
Peak Emitter current – Emitter-Spitzenstrom
Junction temperature – Sperrschichttemperatur
Storage temperature – Lagerungstemperatur
- VCE0
- VCB0
- VEB0
Ptot
- IC
- ICM
- IBM
IEM
Tj
TS
BC 856W
65 V
80 V
Grenzwerte (TA = 25/C)
BC 857W BC 858W
BC 860W BC 859W
45 V 30 V
50 V 30 V
5V
200 mW 1)
100 mA
200 mA
200 mA
200 mA
150/C
- 65…+ 150/C
Characteristics (Tj = 25/C)
DC current gain – Kollektor-Basis-Stromverhältnis 2)
- VCE = 5 V, - IC = 10 :A
hFE
- VCE = 5 V, - IC = 2 mA
hFE
h-Parameters at - VCE = 5V, - IC = 2 mA, f = 1 kHz
Small signal current gain – Stromverstärkung hfe
Input impedance – Eingangs-Impedanz
hie
Output admittance – Ausgangs-Leitwert
hoe
Reverse voltage transfer ratio
Spannungsrückwirkung
hre
Group A
Kennwerte (Tj = 25/C)
Group B
Group C
typ. 90
110...220
typ. 150
200...450
typ. 270
420...800
typ. 220
1.6...4.5 kS
18 < 30 :S
typ.1.5 *10-4
typ. 330
3.2...8.5 kS
30 < 60 :S
typ. 2 *10-4
typ. 600
6...15 kS
60 < 110 :S
typ. 3 *10-4
1) Mounted on P.C. board with 3 mm2 copper pad at each terminal
Montage auf Leiterplatte mit 3 mm2 Kupferbelag (Lötpad) an jedem Anschluß
2) Tested with pulses tp = 300 :s, duty cycle # 2% – Gemessen mit Impulsen tp = 300 :s, Schaltverhältnis # 2%
16 01.11.2003

قانون اساسیصفحه 2
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