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PDF BH16374BDL Data sheet ( Hoja de datos )

Número de pieza BH16374BDL
Descripción 16-bit D-type flip-flop; positive-edge trigger 3-State
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



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INTEGRATED CIRCUITS
74ABT16374B
74ABTH16374B
16-bit D-type flip-flop;
positive-edge trigger (3-State)
Product specification
Supersedes data of 1995 Sep 28
IC23 Data Handbook
1998 Feb 27
Philips
Semiconductors

1 page




BH16374BDL pdf
Philips Semiconductors
16-bit D-type flip-flop; positive-edge trigger
(3-State)
Product specification
74ABT16374B
74ABTH16374B
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Tamb = +25°C
Tamb = –40°C
to +85°C
UNIT
MIN TYP MAX MIN MAX
VIK
VOH
VOL
VRST
II
Input clamp voltage
High-level output voltage
Low-level output voltage
Power-up output voltage3
Input leakage current
74ABT16374B
VCC = 4.5V; IIK = –18mA
VCC = 4.5V; IOH = –3mA; VI = VIL or VIH
VCC = 5.0V; IOH = –3mA; VI = VIL or VIH
VCC = 4.5V; IOH = –32mA; VI = VIL or VIH
VCC = 4.5V; IOL = 64mA; VI = VIL or VIH
VCC = 5.5V; IO = 1mA; VI = GND or VCC
VCC = 5.5V; VI = VCC or GND
–0.9 –1.2
–1.2
2.5 2.9
2.5
3.0 3.4
3.0
2.0 2.4
2.0
0.42 0.55
0.55
0.13 0.55
0.55
V
V
V
V
0.01 ±1
±1 µA
II
IHOLD
IOFF
IPU/PD
IOZH
IOZL
ICEX
IO
ICCH
ICCL
ICCZ
ICC
Input leakage current
74ABTH16374B
VCC = 5.5V; VI = VCC or
GND
VCC = 5.5V; VI = VCC
VCC = 5.5V; VI = 0
Control pins
Data pins5
±0.01
0.01
–1
±1
1
–3
±1
1
–5
Bus Hold current inputs6
74ABTH16374B
VCC = 4.5V; VI = 0.8V
VCC = 4.5V; VI = 2.0V
VCC = 5.5V; VI = 0 to 5.5V
50
–75
±800
50
–75
Power-off leakage current VCC = 0.0V; VO or VI 4.5V
±5.0 ±100
±100
Power-up/down 3-State
output current4
VCC = 2.1V; VO = 0.5V;
VI = GND or VCC; V OE = GND
±5.0 ±50
±50
3-State output High current VCC = 5.5V; VO = 2.7V; VI = VIL or VIH
0.5 10
10
3-State output Low current VCC = 5.5V; VO = 0.5V; VI = VIL or VIH
–0.5 –10
–10
Output High leakage current VCC = 5.5V; VO = 5.5V; VI = GND or VCC
Output current1
VCC = 5.5V; VO = 2.5V
5.0 50
50
–50 –70 –180 –50 –180
VCC = 5.5V; Outputs High, VI = GND or VCC
0.5 2
2
Quiescent supply current VCC = 5.5V; Outputs Low, VI = GND or VCC
8 19
19
VCC = 5.5V; Outputs 3-State;
VI = GND or VCC
0.5 2
2
Additional supply current
per input pin2
74ABT16374B
VCC = 5.5V; one input at 3.4V, other inputs at
VCC or GND
5 100
100
µA
µA
µA
µA
µA
µA
µA
mA
mA
mA
mA
µA
ICC
Additional supply current
per input pin2
74ABTH16374B
VCC = 5.5V; one input at 3.4V, other inputs at
VCC or GND
0.5 1.5
1.5 mA
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
4. This parameter is valid for any VCC between 0V and 2.1V with a transition time of up to 10msec. From VCC = 2.1V to VCC = 5V ± 10% a
transition time of up to 100µsec is permitted.
5. Unused pins at VCC or GND.
6. This is the bus hold overdrive current required to force the input to the opposite logic state.
1998 Feb 27
5

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