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PDF EM78P156EL Data sheet ( Hoja de datos )

Número de pieza EM78P156EL
Descripción 8-Bit Microcontroller
Fabricantes ELAN Microelectronics 
Logotipo ELAN Microelectronics Logotipo



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EM78P156EL
8-Bit Microcontroller
with OTP ROM
Product
Specification
DOC. VERSION 1.4
ELAN MICROELECTRONICS CORP.
April 2016

1 page




EM78P156EL pdf
EM78P156EL
8-Bit Microcontroller with OTP ROM
1 General Description
EM78P156EL is an 8-bit microprocessor designed and developed with low-power and
high-speed CMOS technology. It is equipped with 1K*13-bits Electrical One Time
Programmable Read Only Memory (OTP-ROM). It provides a PROTECTION bit to
prevent user’s code in the OTP memory from being intruded. 6 OPTION bits are also
available to meet user’s requirements.
With its OTP-ROM feature, the EM78P156EL is able to offer a convenient way of
developing and verifying user’s programs. Moreover, user can take advantage of EMC
Writer to easily program his development code.
2 Features
Operating voltage range : 2.3V~5.5V
Operating temperature range: 0C~70C
Operating frequency range (Base on 2 clocks ):
Crystal mode: DC~20 MHz at 5V, DC~8 MHz at 3V, DC~4 MHz at 2.3V.
ERC mode: DC~4 MHz at 5V, DC~4 MHz at 3V, DC~4 MHz at 2.3V.
Low power consumption:
Less than 2.0 mA at 5V/4 MHz
Typically 15 A at 3V/32kHz
Typically 1 A during sleep mode
1K 13 bits on-chip ROM
One security register to prevent intrusion of OTP memory codes
One configuration register to accommodate user’s requirements
488 bits on chip registers (SRAM, general purpose register)
2 bi-directional I/O ports
5-level stacks for subroutine nesting
8-bit real time clock/counter (TCC) with selective signal sources, trigger edges, and
overflow interrupt
Two clocks per instruction cycle
Power down (SLEEP) mode
Three available interrupts
TCC overflow interrupt
Input-port status changed interrupt (wake up from sleep mode)
External interrupt
Product Specification (V1.4) 04.27.2016
(This specification is subject to change without prior notice)
1

5 Page





EM78P156EL arduino
EM78P156EL
8-Bit Microcontroller with OTP ROM
PC (A9 ~ A0)
Reset Vector
Interrupt Vector
000H
008H
Address
00
01
02
03
04
05
06
07
08
09
0A
0B
0C
0D
0E
0F
10
:
3F
Stack Level 1
Stack Level 2
Stack Level 3
Stack Level 4
Stack Level 5
On-chip Program
Memory
Figure 3 Program Counter Organization
3FFH
R PAGE registers
IOC PAGE registers
R0 (IAR)
Reserve
R1
(TCC)
CONT
(Control Register)
R2 (PC)
Reserve
R3 (Status)
Reserve
R4 (RSR)
Reserve
R5
(Port 5)
IOC5
(I/O Port Control Register)
R6
(Port 6)
IOC6
(I/O Port Control Register)
Reserve
Reserve
Reserve
Reserve
Reserve
Reserve
Reserve
IOCA
(Prescaler Control Register)
Reserve
IOCB
(Pull-down Register)
Reserve
IOCC
(Open-drain Control)
Reserve
IOCD
(Pull-high Control Register)
Reserve
IOCE
(WDT Control Register)
RF
(Interrupt Status)
IOCF
(Interrupt Mask Register)
General Registers
Figure 4 Data Memory Configuration
Product Specification (V1.4) 04.27.2016
(This specification is subject to change without prior notice)
7

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