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PDF NCT6627UD Data sheet ( Hoja de datos )

Número de pieza NCT6627UD
Descripción LPC I/O
Fabricantes nuvoton　
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No Preview Available ! NCT6627UD Hoja de datos, Descripción, Manual

W83627UHG
NCT6627UD
NUVOTON LPC I/O
Date: October 26th, 2010 Revision: 1.7
Publication Release Date: October 26, 2010
-I- Revision 1.7

1 page




NCT6627UD pdf
8.79 Reserved Registers – Index 52h (Bank 2).......................................................................... 87
8.80 Reserved Registers – Index 53h (Bank 2).......................................................................... 87
8.81 Reserved Registers – Index 54h (Bank 2).......................................................................... 87
8.82 Reserved Registers – Index 55h (Bank 2).......................................................................... 87
8.83 Reserved Registers – Index 56h (Bank 2).......................................................................... 87
8.84 Interrupt Status Register 3 – Index 50h (Bank 4) ............................................................... 87
8.85 SMI# Mask Register 4 – Index 51h (Bank 4) ...................................................................... 87
8.86 Reserved Register – Index 52h (Bank 4)............................................................................ 88
8.87 BEEP Control Register 3 – Index 53h (Bank 4).................................................................. 88
8.88 SYSTIN Temperature Sensor Offset Register – Index 54h (Bank 4) ................................. 89
8.89 CPUTIN Temperature Sensor Offset Register – Index 55h (Bank 4)................................. 89
8.90 Reserved Registers – Index 56h (Bank 4).......................................................................... 89
8.91 Reserved Register – Index 57h-58h (Bank 4) .................................................................... 89
8.92 Real Time Hardware Status Register I – Index 59h (Bank 4)............................................. 89
8.93 Real Time Hardware Status Register II – Index 5Ah (Bank 4) ........................................... 90
8.94 Real Time Hardware Status Register III – Index 5Bh (Bank 4) .......................................... 91
8.95 Reserved Register – Index 5Ch – 5Fh (Bank 4)................................................................. 91
8.96 Value RAM 2 ⎯ Index 50h-59h (Bank 5) ........................................................................... 91
8.97 Reserved Register – Index 50h – 57h (Bank 6).................................................................. 92
9. FLOPPY DISK CONTROLLER ................................................................................................. 93
9.1 FDC Functional Description ................................................................................................ 93
9.1.1 FIFO (Data) .................................................................................................................................93
9.1.2 Data Separator............................................................................................................................94
9.1.3 Write Precompensation ...............................................................................................................94
9.1.4 Perpendicular Recording Mode...................................................................................................94
9.1.5 FDC Core ....................................................................................................................................94
9.1.6 FDC Commands .........................................................................................................................95
9.2 Register Descriptions........................................................................................................ 103
9.2.1 Status Register A (SA Register) (Read base address + 0) .......................................................103
9.2.2 Status Register B (SB Register) (Read base address + 1) .......................................................104
9.2.3 Digital Output Register (DO Register) (Write base address + 2)...............................................105
9.2.4 Tape Drive Register (TD Register) (Read base address + 3) ...................................................106
9.2.5 Main Status Register (MS Register) (Read base address + 4) .................................................107
9.2.6 Data Rate Register (DR Register) (Write base address + 4).....................................................108
9.2.7 FIFO Register (R/W base address + 5).....................................................................................109
9.2.8 Digital Input Register (DI Register) (Read base address + 7) ...................................................112
9.2.9 Configuration Control Register (CC Register) (Write base address + 7) ...................................113
10. UART PORT ........................................................................................................................... 115
10.1 Universal Asynchronous Receiver/Transmitter (UART A, B, C, D, E, F) ......................... 115
10.2 Register Address .............................................................................................................. 115
10.2.1 UART Control Register (UCR) (Read/Write)............................................................................115
10.2.2 UART Status Register (USR) (Read/Write) .............................................................................118
10.2.3 Handshake Control Register (HCR) (Read/Write) ...................................................................119
10.2.4 Handshake Status Register (HSR) (Read/Write).....................................................................119
10.2.5 This register is used to control the FIFO functions of the UART..............................................120
Publication Release Date: October 26, 2010
-V- Revision 1.7

5 Page





NCT6627UD arduino
W83627UHG/NCT6627UD
The configuration registers inside the W83627UHG support mode selection, function enable and disable, and
power-down selection. Furthermore, the configurable PnP features are compatible with the plug-and-play feature
in Windows 95/98/2000/XPTM, making the allocation of the system resources more efficient than ever.
One special characteristic of the Super I/O product line is the separation of the power supply in normal operation
from that in standby operation. Please pay attention to the layout of these two power supplies to avoid short
circuits. Otherwise, the feature will not function.
There is NCT6627UD, which is exactly the same as W83627UHG, except the package dimension. NCT6627UD
is thin package type, LQFP-128, 14mm x 14mm body size; W83627UHG is QFP-128, 14mm x 20mm body size.
Publication Release Date: October 26, 2010
-2- Revision 1.7

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