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PDF N76E885 Data sheet ( Hoja de datos )
| Número de pieza | N76E885 | |
| Descripción | 8051-based Microcontroller | |
| Fabricantes | Nuvoton | |
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N76E885 Datasheet
Nuvoton 1T 8051-based Microcontroller
N76E885
Datasheet
Dec. 21, 2015
Page 1 of 196
Rev. 1.01
1 page  
N76E885 Datasheet
1. GENERAL DESCRIPTION
The N76E885 is an embedded flash type, 8-bit high performance 1T 8051-based microcontroller. The
instruction set is fully compatible with the standard 80C51 and performance enhanced.
The N76E885 contains a up to 18K Bytes of main Flash called APROM, in which the contents of User
Code resides. The N76E885 Flash supports In-Application-Programming (IAP) function, which
enables on-chip firmware updates. IAP also makes it possible to configure any block of User Code
array to be used as non-volatile data storage, which is written by IAP and read by IAP or MOVC
instruction. There is an additional Flash called LDROM, in which the Boot Code normally resides for
carrying out In-System-Programming (ISP). The LDROM size is configurable with a maximum of 4K
Bytes. To facilitate programming and verification, the Flash allows to be programmed and read
electronically by parallel Writer or In-Circuit-Programming (ICP). Once the code is confirmed, user can
lock the code for security.
The N76E885 provides rich peripherals including 256 Bytes of SRAM, 256 Bytes of auxiliary RAM
(XRAM), Up to 26 general purpose I/O, two 16-bit Timers/Counters 0/1, one 16-bit Timer2 with three-
channel input capture module, one Watchdog Timer (WDT), one Self Wake-up Timer (WKT), one 16-
bit auto-reload Timer3 for general purpose or baud rate generator, two UARTs with frame error
2
detection and automatic address recognition, one SPI, one I C, four pairs of enhanced PWM output
channels, eight-channel shared pin interrupt for all I/O, and one 10-bit ADC. The peripherals are
equipped with 18 sources with 4-level-priority interrupts capability.
The N76E885 is equipped with five clock sources and supports switching on-the-fly via software. The
four clock sources include 2 MHz to 25 MHz high-speed external crystal/resonator, 32.768 kHz low-
speed external crystal/resonator, external clock input, 10 kHz internal oscillator, and one 22.118 MHz
internal precise oscillator that is factory trimmed to ±1% at room temperature. The N76E885 provides
additional power monitoring detection such as power-on reset and 8-level brown-out detection, which
stabilizes the power-on/off sequence for a high reliability system design.
The N76E885 microcontroller operation consumes a very low power with two economic power modes
to reduce power consumption － Idle and Power-down mode, which are software selectable. Idle
mode turns off the CPU clock but allows continuing peripheral operation. Power-down mode stops the
whole system clock for minimum power consumption. The system clock of the N76E885 can also be
slowed down by software clock divider, which allows for a flexibility between execution performance
and power consumption.
With high performance CPU core and rich well-designed peripherals, the N76E885 benefits to meet a
general purpose, home appliances, or motor control system accomplishment.
Dec. 21, 2015
Page 5 of 196
Rev. 1.01
5 Page 
N76E885 Datasheet
Table 4–1. Pin Description
Pin Number
TSSOP20
TSSOP28
Symbol
Multi-Function Description[1]
20
1
19
18
17
16
15
14
13
12
2
3
Dec. 21, 2015
28 VDD
1 GND
P0[7:0]
POWER SUPPLY: Supply voltage VDD for
operation.
GROUND: Ground potential.
PORT0: Port 0 is a bit-addressable, 8-bit I/O port.
After reset, all pins are in input-only mode.
P0.0: Port 0 bit 0.
AIN0: ADC input channel 0.
27
P0.0/AIN0/VREF/̅̅̅̅̅̅̅/ICPDA/ VREF: ADC VREF voltage input.
OCDDA
̅̅̅̅̅̅̅: External interrupt 0 input.
ICPDA: ICP data input or output.
OCDDA: OCD data input or output.
P0.1: Port 0 bit 1.
26
P0.1/AIN1/̅̅̅̅̅̅̅/ICPCK/
OCDCK
AIN1: ADC input channel 1.
̅̅̅̅̅̅̅: External interrupt 1 input.
ICPCK: ICP clock input.
OCDCK: OCD clock input.
P0.2: Port 0 bit 2.
25 P0.2/AIN2/PWM2
AIN2: ADC input channel 2.
PWM2: PWM output channel 2.
P0.3: Port 0 bit 3.
24 P0.3/AIN3/PWM3/TXD
AIN3: ADC input channel 3.
PWM3: PWM output channel 3.
TXD[2]: Serial port 0 transmit data output.
23 P0.4/AIN4/̅̅̅̅
P0.4: Port 0 bit 4.
AIN4: ADC input channel 4.
̅̅̅̅: SPI slave select input.
P0.5: Port 0 bit 5.
22
P0.5/AIN5/PWM4/SPCLK
AIN5: ADC input channel 5.
PWM4: PWM output channel 4.
SPCLK: SPI clock.
P0.6: Port 0 bit 6.
21 P0.6/AIN6/PWM5/SCL
AIN6: ADC input channel 6.
PWM5: PWM output channel 5.
SCL: I2C clock.
P0.7: Port 0 bit 7.
20 P0.7/AIN7/PWM6
AIN7: ADC input channel 7.
PWM6: PWM output channel 6.
PORT1: Port 1 is a bit-addressable, maximum 3-bit
P1[2:0]
I/O port. P1.2 is a dedicate input-only pin if
available.
P1.0: Port 1 bit 0 available when the internal
oscillator is used as the system clock.
2 P1.0/XIN/PWM0
XIN: If HXT or LXT is used, XIN is the input pin to the
internal inverting amplifier. If the ECLK mode is
enabled, XIN is the external clock input pin.
PWM0: PWM output channel 0.
P1.1: Port 1 bit 1 available when the internal
oscillator or the external clock input is used as the
3 P1.1/XOUT/PWM1
system clock.
XOUT: If HXT or LXT is used, XOUT is the output pin
from the internal inverting amplifier. It emits the
Page 11 of 196
Rev. 1.01
11 Page | ||
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