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What is 2N5794UC?

This electronic component, produced by the manufacturer "Microsemi", performs the same function as "NPN SILICON DUAL TRANSISTOR".


2N5794UC Datasheet PDF - Microsemi

Part Number 2N5794UC
Description NPN SILICON DUAL TRANSISTOR
Manufacturers Microsemi 
Logo Microsemi Logo 


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TECHNICAL DATA SHEET
6 Lake Street, Lawrence, MA 01841
6 Lake Street, Lawrence, MA 01841
1-800-446-1158 / (978) 620-2600 / Fax: (978) 689-0803
Website: http://www.microsemi.com
Gort Road Business Park, Ennis, Co. Clare, Ireland
Tel: +353 (0) 65 6840044 Fax: +353 (0) 65 6822298
NPN SILICON DUAL TRANSISTOR
Qualified per MIL-PRF-19500 /495
DEVICES
2N5793
2N5794
2N5794U 2N5794UC
LEVELS
JAN
JANTX
JANTV
JANS
ABSOLUTE MAXIMUM RATINGS (TC = +25°C unless otherwise noted)
Parameters / Test Conditions
Collector-Emitter Voltage
Collector-Base Voltage
Emitter-Base Voltage
Collector Current
Total Power Dissipation @ TA = +25°C
Symbol
VCEO
VCBO
VEBO
IC
PT
Value
40
75
6.0
600
One Total
Section 1 Device 2
0.5 0.6
Operating & Storage Junction Temperature Range Top, Tstg
-65 to +200
Unit
Vdc
Vdc
Vdc
mAdc
W
°C
NOTES:
1. Derate linearly 2.86 mW/°C for TA > +25°C
2. Derate linearly 3.43 mW/°C for TA > +25°C
ELECTRICAL CHARACTERISTICS (TA = +25°C, unless otherwise noted)
Parameters / Test Conditions
OFF CHARACTERTICS
Collector-Emitter Breakdown Current
IC = 10mAdc
Symbol Min.
Max.
V(BR)CEO
40
Collector-Base Cutoff Current
VCB = 75Vdc
VCB = 50Vdc
Emitter-Base Cutoff Current
VEB = 6.0Vdc
VEB = 4.0Vdc
ICBO
10
10
IEBO
10
10
Unit
Vdc
Adc
Adc
Adc
Adc
TO-78
6 PIN SURFACE MOUNT
T4-LDS-0213 Rev. 1 (111181)
Page 1 of 5

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2N5794UC equivalent
6 Lake Street, Lawrence, MA 01841
6 Lake Street, Lawrence, MA 01841
1-800-446-1158 / (978) 620-2600 / Fax: (978) 689-0803
Website: http://www.microsemi.com
TECHNICAL DATA SHEET
Gort Road Business Park, Ennis, Co. Clare, Ireland
Tel: +353 (0) 65 6840044 Fax: +353 (0) 65 6822298
Symbol
BL
BL2
BW
BW2
CH
L3
LH
Dimensions
Inches
Millimeters
Min Max Min Max
.240 .250 6.10 6.35
.250 6.35
.165 .175 4.19 4.45
.175 4.45
.058 .115 1.47 2.92
.003 .007 0.08 0.18
.026 .039 0.66 0.99
Symbol
LL1
LL2
LS1
LS2
LW
LW2
Dimensions
Inches
Millimeters
Min Max Min Max
.060 .070 1.52 1.78
.082 .098 2.08 2.49
.095 .105 2.41 2.67
.045 .055 1.14 1.40
.022 .028 0.56 0.71
.006 .022 0.15 0.56
NOTES:
1. Dimensions are in inches.
2. Millimeters are given for general information only.
3. Dimension "CH" controls the overall package thickness and is ceramic.
4. The corner shape (square, notch, radius, etc.) may vary at the manufacturer's option from that shown on the
drawing.
5. Dimensions "LW2" minimum and "L3" minimum and the appropriate castellation length define an unobstructed
three-dimensional space traversing all of the ceramic layers in which a castellation was designed. (Castellations
are required on bottom two layers, optional on top ceramic layer.) Dimension "LW2" maximum and "L3"
maximum define the maximum width and depth of the castellation at any point on its surface. Measurement of
these dimensions may be made prior to solder dipping.
6. Lead 4 = Collector.
7. In accordance with ASME Y14.5M, diameters are equivalent to x symbology.
FIGURE 3. Physical dimensions, 2N5794UC.
T4-LDS-0213 Rev. 1 (111181)
Page 5 of 5


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2N5794UCThe function is NPN SILICON DUAL TRANSISTOR. MicrosemiMicrosemi

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