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PDF MBM29PL160TD-75 Data sheet ( Hoja de datos )
| Número de pieza | MBM29PL160TD-75 | |
| Descripción | 16M (2M x 8/1M x 16) BIT FLASH MEMORY | |
| Fabricantes | Fujitsu | |
| Logotipo |  |
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FUJITSU SEMICONDUCTOR
DATA SHEET
DS05-20872-1E
PAGE MODE FLASH MEMORY
CMOS
16M (2M × 8/1M × 16) BIT
MBM29PL160TD-75/-90/MBM29PL160BD-75/-90
s FEATURES
• Single 3.0 V read, program and erase
Minimizes system level power requirements
• Compatible with JEDEC-standard commands
Uses same software commands as E2PROMs
• Compatible with MASK ROM pinouts
48-pin TSOP (I) (Package suffix: PFTN-Normal Bend Type, PFTR-Reversed Bend Type)
44-pin SOP (Package suffix: PF)
• Minimum 100,000 program/erase cycles
• High performance
25 ns maximum page access time (75ns maximum random access time)
• An 8 words page read mode function
• Sector erase architecture
One 8K word, two 4K words, one 112K word, and seven 128K words sectors in word mode
One 16K byte, two 8K bytes, one 224K byte, and seven 256K bytes sectors in byte mode
Any combination of sectors can be concurrently erased. Also supports full chip erase
• Boot Code Sector Architecture
T = Top sector
B = Bottom sector
• Embedded EraseTM Algorithms
Automatically pre-programs and erases the chip or any sector
• Embedded programTM Algorithms
Automatically programs and verifies data at specified address
• Data Polling and Toggle Bit feature for detection of program or erase cycle completion
• Ready/Busy output (RY/BY)
Hardware method for detection of program or erase cycle completion
• Automatic sleep mode
When addresses remain stable, automatically switches themselves to low power mode
• Low VCC write inhibit ≤ 2.5 V
(Continued)
Embedded EraseTM and Embedded ProgramTM are trademarks of Advanced Micro Devices, Inc.
1 page  
MBM29PL160TD-75/-90/MBM29PL160BD-75/-90
s PRODUCT LINE UP
Part No.
Ordering Part No.
VCC
=
3.0
V
+0.6 V
–0.3 V
Max. Address Access Time (ns)
Max. Page Address Access Time (ns)
Max. CE Access Time (ns)
Max. OE Access Time (ns)
s BLOCK DIAGRAM
MBM29PL160TD/160BD
-75 -90
75 90
25 35
75 90
25 35
VCC
VSS
WE
BYTE
CE
OE
DQ0 to DQ15
Erase Voltage
Generator
Input/Output
Buffers
State
Control
Command
Register
Program Voltage
Generator
Chip Enable
Output Enable
Logic
STB Data Latch
A0 to A19
A-1
STB Y-Decoder
Low VCC Detector
Timer for
Program/Erase
Address
Latch
X-Decoder
Y-Gating
Cell Matrix
5
5 Page 
MBM29PL160TD-75/-90/MBM29PL160BD-75/-90
Table 4.1 MBM29PL160TD/BD Sector Protection Verify Autoselect Code
Type
A12 to A19
A6
A1
A0
A-1*1
Code
(HEX)
Manufacture’s Code
X VIL VIL VIL VIL 04H
Device Code
Byte
MBM29PL160TD
Word
Byte
MBM29PL160BD
Word
X
X
VIL 27H
VIL VIL VIH
X 2227H
VIL 45H
VIL VIL VIH
X 2245H
Sector Protection
Sector
Addresses
VIL
VIH
VIL
VIL 01H*2
Temporary Sector Unprotection
X VIL VIH VIH VIL 01H*3
*1: A-1 is for Byte mode.
*2: Outputs 01H at protected sector addresses and outputs 00H at unprotected sector addresses.
*3: Outputs 01H at Temporary Sector Unprotect and outputs 00H at Non Temporary Sector Unprotect.
Table 4.2 Expanded Autoselect Code Table
Type
Code DQ15 DQ14 DQ13 DQ12 DQ11 DQ10 DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0
Manufacture’s Code
04H A-1/0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0
(B) 27H A-1 HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z 1 0 1 0 0 1 1 1
MBM29PL160TD
Device
(W) 2227H 0 0 1 0 0 0 1 0 1 0 1 0 0 1 1 1
Code
(B) 45H A-1 HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z 0 1 0 0 0 1 0 1
MBM29PL160BD
(W) 2245H 0 0 1 0 0 0 1 0 0 1 0 0 0 1 0 1
Sector Protection
01H A-1/0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
Temporary Sector
Unprotection
01H A-1/0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
(B): Byte mode
(W): Word mode
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MBM29PL160TD-75.PDF ] | |
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