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PDF LTM4650-1 Data sheet ( Hoja de datos )
| Número de pieza | LTM4650-1 | |
| Descripción | Dual 25A or Single 50A uModule Regulator | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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LTM4650-1
Features
Dual 25A or Single 50A
µModule Regulator with 0.8% DC
and 3% Transient Accuracy
Description
nn ±0.8% Maximum Total DC Output Error Over Line
and Load (LTM4650-1A)
nn ±3% Transient Output Error with Minimum
Output Capacitance
nn Dual 25A or Single 50A Output
nn 4.5V to 15V Input, 0.6V to 1.8V Output Voltage Range
nn Differential Remote Sense Amplifier
nn Current Mode Control/Fast Transient Response
nn Current Sharing Up to 300A
nn 16mm × 16mm × 5.01mm BGA Package
Applications
nn FPGA, ASIC, µProcessor Core Voltage Regulation
nn Information, Communication Systems
The LTM®4650-1A/LTM4650-1B is dual 25A or single 50A
output step-down µModule® (power module) regulator
with ±0.8% (LTM4650-1A) and ±1.5% (LTM4650-1B)
total DC output error with ±3% transient output error.
Included in the package are the switching controller,
power FETs, inductors, and all supporting components.
External compensation allows for fast transient response
to minimize output capacitance when powering FPGAs,
ASICs, and processors. With synchronized multiphase
parallel current sharing, six LTM4650-1 devices can de-
liver up to 300A. The LTM4650-1 is offered in a 16mm ×
16mm × 5.01 BGA package, with SnPb (BGA) or RoHS
compliant terminal finish.
L, LT, LTC, LTM, Linear Technology, the Linear logo, µModule, Burst Mode, LTpowerCAD and
PolyPhase are registered trademarks of Linear Technology Corporation. All other trademarks are
the property of their respective owners. Protected by U.S. Patents, including 5481178, 5705919,
5929620, 6100678, 6144194, 6177787, 6304066 and 6580258. Other patents pending.
Typical Application
50A, 1.0V Output DC/DC µModule Regulator
VIN
4.5V TO
15V
22µF
* 25V
×4
120k
VIN
TEMP
VOUT1
DIFFOUT
RUN1
VOUTS2
RUN2
TRACK1
LTM4650-1
VFB1
VFB2
0.1µF
TRACK2
INTVCC
COMP1
COMP2
4.7µF 10k
PINS NOT USED
IN THIS CIRCUIT:
CLKOUT
EXTVCC
SW1
SW2
VOUTS1
PGOOD1
PGOOD2
DIFFP
fSET VOUT2
121k PHASMD SGND GND MODE_PLLIN DIFFN
220µF
CERAMIC
4V
×6
68pF
3.24k
90.9k
10nF
VOUT2
1.0V
50A
46501 TA01a
1.0V Output Efficiency, fSW = 500kHz
95
90
85
80
75
70 VIN = 12V
VIN = 5V
65
0 10 20 30 40 50
LOAD CURRENT (A)
46501 TA01b
25% Load Step Transient Response, ±3% Output Regulation Window. 12VIN, 1.0VOUT, 50A with 6x 220μF Ceramic Cap
VOUT
20mV/DIV
AC-COUPLED
54mV
LOAD STEP
10A/DIV
50µs/DIV
46501 TA01c
12.5A STEP
*SEE DEMO CIRCUIT DC2479A-B
For more information www.linear.com/LTM4650-1
46501fc
1
1 page  
LTM4650-1
E lectrical Characteristics The l denotes the specifications which apply over the specified internal
operating temperature range. Specified
unless otherwise noted. Per the typical
as each individual output
application in Figure 24.
channel.
TA
=
25°C
(Note
2),
VIN
=
12V
and
VRUN1,
VRUN2
at
5V
SYMBOL
PARAMETER
Differential Amplifier
AV Differential
Amplifier
Gain
RIN
VOS
PSRR Differential
Amplifier
Input Resistance
Input Offset Voltage
Power Supply Rejection Ratio
ICL
VOUT(MAX)
GBW
Maximum Output Current
Maximum Output Voltage
Gain Bandwidth Product
VTEMP
TC
Diode Connected PNP
Temperature Coefficient
CONDITIONS
Measured at DIFFP Input
VDIFFP = VDIFFOUT = 1.2V, IDIFFOUT = 100µA
5V < VIN < 15V
IDIFFOUT = 300µA
I = 100µA
MIN TYP MAX UNITS
1 V/V
80
3
90
kΩ
mV
dB
INTVCC – 1.4
l
3
3
0.6
–2.2
mA
V
MHz
V
mV/C
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTM4650-1 is tested under pulsed load conditions such that
TJ ≈ TA. The LTM4650-1E is guaranteed to meet specifications from
0°C to 125°C internal temperature. Specifications over the –40°C to
125°C internal operating temperature range are assured by design,
characterization and correlation with statistical process controls. The
LTM4650-1I is guaranteed over the full –40°C to 125°C internal operating
temperature range. Note that the maximum ambient temperature
consistent with these specifications is determined by specific operating
conditions in conjunction with board layout, the rated package thermal
impedance and other environmental factors.
Note 3: Two outputs are tested separately and the same testing condition
is applied to each output.
Note 4: LTM4650-1 device is designed to operate from 400kHz to 750kHz.
Note 5: These parameters are tested at wafer sort.
Note 6: See output current derating curves for different VIN, VOUT and TA.
Typical Performance Characteristics
Efficiency vs Output Current,
VIN = 5V
95
90
85
80
75 0.8VOUT, 400kHz
1.0VOUT, 500kHz
70
1.2VOUT, 500kHz
1.5VOUT, 600kHz
1.8VOUT, 600kHz
65
0 5 10 15 20 25
LOAD CURRENT (A)
46501 G01
Efficiency vs Output Current,
VIN = 12V
95
90
85
80
75 0.8VOUT, 400kHz
1.0VOUT, 500kHz
70
1.2VOUT, 500kHz
1.5VOUT, 600kHz
1.8VOUT, 600kHz
65
0 5 10 15 20 25
LOAD CURRENT (A)
46501 G02
For more information www.linear.com/LTM4650-1
Dual Phase Single Output Efficiency
vs
fS
Output Current,
= 500kHz
VIN
=
12V,
95
90
85
80
75 0.8VOUT, 400kHz
1.0VOUT, 500kHz
70
1.2VOUT, 500kHz
1.5VOUT, 600kHz
1.8VOUT, 600kHz
65
0 10 20 30 40 50
LOAD CURRENT (A)
46501 G03
46501fc
5
5 Page 
LTM4650-1
Applications Information
The typical LTM4650-1 application circuit is shown in
Figure 24. External component selection is primarily
determined by the maximum load current and output
voltage. Refer to Table 4 for specific external capacitor
requirements for particular applications.
Output Total DC Accuracy and AC Transient
Performance
In modern ASIC and FPGA power supply designs, a tight
total voltage regulation window, ±3% for example, is re-
quired of the supply powering the core and periphery. To
meet this requirement, the supply’s DC voltage variance
plus any AC voltage variation which may occur during any
load step transient must fall within this allowed window.
The DC voltage variance is determined by the accuracies
of the supply’s reference voltage, resistor divider, load
regulation and line regulation over the operating tempera-
ture range. The AC voltage variance is determined by the
supply’s output voltage overshoot and undershoots in
response to a load transient condition for a given output
capacitor network.
Figure 2 shows a typical load step transient response
waveform together with DC voltage accuracy variance. For
a given allowable voltage regulation window, a tighter DC
voltage accuracy allows more margin for the AC variation
due to a load transient response. This increased margin
for AC variation allows for a reduction in the total output
capacitance required to meet the regulation window re-
quirement. This allows for a reduced total solution cost
and footprint area.
LOAD STEP
AC OVERSHOOT
ALLOWABLE
REGULATION DC ACCURACY
WINDOW
AC UNDERSHOOT
46501 F02
Figure 2. Typical Load Step Transient Response with DC Voltage
Accuracy Variance
For example, in an FPGA core voltage application, for a 12V
input, 0.9V output at 72A design, a total overall ±3% total
voltage regulation window is required in responding to a
25% load step transient. Figure 3 illustrates the benefit of
overall output capacitor reduction versus improved total
DC accuracy by using 100µF ceramic output capacitors.
5000
4500
4700
4000
3500
3000
2500
2000
2200
2600
3200
1500
1000
500
0
0.8 1.2 1.5 2.0
TOTAL DC ACCURACY (%)
46501 F03
Figure 3. Overall Output Capacitor vs Total DC Accuracy
VIN to VOUT Step-Down Ratios
There are restrictions in the maximum VIN and VOUT step-
down ratio that can be achieved for a given input voltage.
Each output of the LTM4650-1 is capable of 98% duty
cycle, but the VIN to VOUT minimum dropout is still shown
as a function of its load current and will limit output cur-
rent capability related to high duty cycle on the top side
switch. Minimum on-time tON(MIN) is another consideration
in operating at a specified duty cycle while operating at
a certain frequency due to the fact that tON(MIN) < D/fSW,
where D is duty cycle and fSW is the switching frequency.
tON(MIN) is specified in the electrical parameters as 90ns.
Output Voltage Programming
The PWM controller has an internal 0.6V reference voltage.
As shown in the Block Diagram, a 60.4kΩ internal feedback
resistor connects between the VOUTS1 to VFB1 and VOUTS2
to VFB2. It is very important that these pins be connected
to their respective outputs for proper feedback regulation.
Overvoltage can occur if these VOUTS1 and VOUTS2 pins are
left floating when used as individual regulators, or at least
one of them is used in paralleled regulators. The output
voltage will default to 0.6V with no feedback resistor on
For more information www.linear.com/LTM4650-1
46501fc
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11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet LTM4650-1.PDF ] | |
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