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Número de pieza | CBT3384 | |
Descripción | 10-bit bus switch | |
Fabricantes | NXP Semiconductors | |
Logotipo | ||
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No Preview Available ! CBT3384
10-bit bus switch with 5-bit output enables
Rev. 06 — 2 November 2009
Product data sheet
1. General description
The CBT3384 provides ten bits of high-speed TTL-compatible bus switching. The low
ON resistance of the switch allows connections to be made with minimal propagation
delay.
The CBT3384 device is organized as two 5-bit bus switches with two separate output
enable (1OE, 2OE) inputs. When nOE is LOW, the switch is on and port A is connected to
the B port. When nOE is HIGH, each switch is disabled.
The CBT3384 is characterized for operation from −40 °C to +85 °C.
2. Features
I 5 Ω switch connection between two ports
I TTL-compatible control input levels
I Multiple package options
I See CBTD3384 for CBT3384 with level shifting diodes
I Latch-up protection exceeds 100 mA per JESD78
I ESD protection:
N HBM JESD22-A114E exceeds 2000 V
N CDM JESD22-C101C exceeds 1000 V
3. Ordering information
Table 1. Ordering information
Type
number
Package
Temperature range Name
Description
CBT3384D −40 °C to +85 °C SO24
plastic small outline package; 24 leads; body width 7.5 mm
CBT3384DB −40 °C to +85 °C
SSOP24 plastic shrink small outline package; 24 leads;
body width 5.3 mm
CBT3384DK −40 °C to +85 °C
SSOP24[1] plastic shrink small outline package; 24 leads; body
width 3.9 mm; lead pitch 0.635 mm
CBT3384PW −40 °C to +85 °C
TSSOP24 plastic thin shrink small outline package; 24 leads;
body width 4.4 mm
Version
SOT137-1
SOT340-1
SOT556-1
SOT355-1
[1] Also known as QSOP24 package
1 page NXP Semiconductors
CBT3384
10-bit bus switch with 5-bit output enables
Table 6. Static characteristics …continued
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
RON ON resistance
VCC = 4.5 V; VI = 0 V; II = 64 mA
VCC = 4.5 V; VI = 0 V; II = 30 mA
VCC = 4.5 V; VI = 2.4 V; II = −15 mA
Tamb = −40 °C to +85 °C
Min Typ[1] Max
Unit
[3] - 5 7 Ω
[3] - 5 7 Ω
[3] -
10 15 Ω
[1] All typical values are at VCC = 5 V, Tamb = 25 °C.
[2] This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
[3] Measured by the voltage drop between the nAn and the nBn terminals at the indicated current through the switch. ON resistance is
determined by the lowest voltage of the two (nAn or nBn) terminals.
10. Dynamic characteristics
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 7.
Symbol Parameter
Conditions
Tamb = 25 °C
Min Typ Max
tpd propagation delay nAn, nBn to nBn, nAn; [1][2]
see Figure 5
VCC = 5.0 V ± 0.5 V
- - 0.25
tPZH OFF-state to HIGH nOE to nAn or nBn;
propagation delay see Figure 6
VCC = 5.0 V ± 0.5 V
1.2 2.3 5.7
tPZL OFF-state to LOW nOE to nAn or nBn;
propagation delay see Figure 6
VCC = 5.0 V ± 0.5 V
1.2 2.3 5.7
tPHZ HIGH to OFF-state nOE to nAn or nBn;
propagation delay see Figure 6
VCC = 5.0 V ± 0.5 V
1.7 3.6 5.2
tPLZ LOW to OFF-state nOE to nAn or nBn;
propagation delay see Figure 6
VCC = 5.0 V ± 0.5 V
1.7 2.7 5.2
Tamb = −40 °C to +85 °C Unit
Min Max
- 0.25 ns
1.2 5.6 ns
1.2 6.0 ns
1.7 5.5 ns
1.7 6.6 ns
[1] The propagation delay is the calculated RC time constant of the typical ON resistance of the switch and the specified load capacitance,
when driven by an ideal voltage source (zero output impedance).
[2] tpd is the same as tPLH and tPHL.
CBT3384_6
Product data sheet
Rev. 06 — 2 November 2009
© NXP B.V. 2009. All rights reserved.
5 of 14
5 Page NXP Semiconductors
CBT3384
10-bit bus switch with 5-bit output enables
TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm
SOT355-1
y
Z
24
D
pin 1 index
1
e
EA
X
c
HE
vM A
13
12
wM
bp
A2
A1
Q
(A3)
A
Lp
L
detail X
θ
0 2.5 5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
mm
1.1
0.15
0.05
0.95
0.80
0.25
0.30
0.19
0.2
0.1
D(1) E(2)
e
7.9
7.7
4.5
4.3
0.65
HE
6.6
6.2
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
IEC
REFERENCES
JEDEC
JEITA
SOT355-1
MO-153
L Lp Q v w y Z (1) θ
1
0.75 0.4
0.50 0.3
0.2 0.13 0.1
0.5
0.2
8o
0o
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
Fig 11. Package outline SOT355-1 (TSSOP24)
CBT3384_6
Product data sheet
Rev. 06 — 2 November 2009
© NXP B.V. 2009. All rights reserved.
11 of 14
11 Page |
Páginas | Total 14 Páginas | |
PDF Descargar | [ Datasheet CBT3384.PDF ] |
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