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PDF NL6448BC20-30KH Data sheet ( Hoja de datos )
| Número de pieza | NL6448BC20-30KH | |
| Descripción | LCD Module | |
| Fabricantes | NLT | |
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TFT COLOR LCD MODULE
NL6448BC20-30KH
17cm (6.5 Type)
VGA
LVDS interface (1port)
PRELIMINARY DATA SHEET
DOD-PP-1660 (3rd edition)
This PRELIMINARY DATA SHEET is updated
document from DOD-PP-1583(2).
All information is subject to change without notice.
Please confirm the sales representative before
starting to design your system.
Document Number: DOD-PP-1660 (3rd edition)
Published date: May 2013 CP(N)
1
© NLT Technologies, Ltd.
2013 All rights reserved.
1 page  
NL6448BC20-30KH
2. GENERAL SPECIFICATIONS
Display area
Diagonal size of display
Drive system
Display color
Pixel
Pixel arrangement
Dot pitch
Pixel pitch
Module size
Weight
Contrast ratio
Viewing angle
Designed viewing direction
Touch panel type
Touch panel surface
Touch panel pencil-hardness
Touch panel cover glass
Touch panel bonding method
Color gamut
Response time
Luminance
Signal system
Power supply voltage
132.48 (H) × 99.36 (V) mm
17cm (6.5 inches)
a-Si TFT active matrix
16,777,216 colors (At 8-bit input, FRC terminal= High)
262,144 colors (At 6-bit input, FRC terminal= Low or Open)
640 (H) × 480 (V) pixels
RGB (Red dot, Green dot, Blue dot) vertical stripe
0.069 (H) × 0.207 (V) mm
0.207 (H) × 0.207 (V) mm
153.0 (W) × 118.0 (H) × (10.05) (D) mm (typ.)
TBD g (typ.)
TBD:1 (typ.)
At the contrast ratio ≥10:1
• Horizontal: Right side (80)° (typ.), Left side (80)° (typ.)
• Vertical: Up side (80)° (typ.), Down side (80)° (typ.)
At DPS= Low or Open: Normal scan
• Viewing direction without image reversal: Up side (12 o'clock)
• Viewing direction with contrast peak: Down side (6 o'clock)
• Viewing angle with optimum grayscale (γ≒ 2.2): Normal axis
(perpendicular)
Projected capacitive
Recommended Touch panel controller board (Option)
• Touch panel controller board: Type No. PTPW01
Antiglare
(2)H (min.) [by JIS K5600]
0.7mm normal glass
Optical bonding
At LCD panel center
40 % (typ.) [against NTSC color space]
Ton+Toff (10%←→ 90%)
18 ms (typ.)
At IL= 50 mA/One circuit
(980) cd/m2 (typ.)
LVDS 1port
(Receiver: THC63LVDF84B, THine Electronics Inc. or equivalent)
8bit/6bit digital signals for data of RGB colors, Dot clock (CLK),
Data enable (DE)
LCD panel signal processing board: 3.3V
LED backlight type:
Backlight
Power consumption
Replaceable part
• Lamp holder set: Type No. 65LHS15
Recommended LED driver board (Option)
• LED driver board: Type No. 65PW01F
• Corresponding wiring harness: Type No. 121CBL02
At IL= 50 mA/One circuit, Checkered flag pattern
3.8 W (typ.) (except for T/P)
PRELIMINARY DATA SHEET DOD-PP-1660 (3rd edition)
5
3
5 Page 
NL6448BC20-30KH
4.5 POWER SUPPLY VOLTAGE SEQUENCE
4.5.1 LCD panel signal processing board
VCC
Note1
0V
ON
3.0V
10μs ≤ Tr < 50ms
Display signals*
Function signals
Note2
0V
0ms < t < 35ms
VALID period
OFF
ON
0.3V
Toff ≥ 50ms
0ms < t < 35ms
* These signals should be measured at the terminal of 100Ω resistance.
Note1: If there is a voltage variation (voltage drop) at the rising edge of VCC below 3.0V, there is a
possibility that a product does not work due to a protection circuit.
Note2: Display signals (D0+/-, D1+/-, D2+/-, D3+/- and CLK+/-) and function signals (DPS, FRC,
and MSL) must be set to Low or High-impedance, except the VALID period (See above
sequence diagram), in order to avoid the circuitry damage.
If some of display and function signals of this product are cut while this product is working,
even if the signal input to it once again, it might not work normally. If a customer stops the
display and function signals, VCC also must be shut down.
4.5.2 LED driver board
Display signals
Function signals
Note1
Note2
VALID period
LED backlight: ON
Note1: These are the display and function signals for LCD panel signal processing board.
Note2: The backlight should be turned on within the valid period of display and function signals, in
order to avoid unstable data display.
PRELIMINARY DATA SHEET DOD-PP-1660 (3rd edition)
11
11 Page | ||
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