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Número de pieza | IL3895 | |
Descripción | Display Module | |
Fabricantes | DALIAN GOOD DISPLAY | |
Logotipo | ||
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E paper IC Specifications
IL3895
SPEC NO
REV NO
Good Display
Specifications
Prepared:
Checked:
Approved:
Issue Date:
AiMing Wei
YongCheng Jian
Boris Ren
2016.4.7
Dalian Good Display Co., Ltd.
Good Display
No.17 Gonghua Street, Shahekou District, Dalian 116021 China
Tel: +86-411-84619565 Fax: +86-411-84619585
E-mail: [email protected]
Website: www.good-display.com
1 page IL3895
1 GENERAL DESCRIPTION
IL3895 is a CMOS active matrix bistable display driver with controller. It consists of 150 source
outputs, 250 gate outputs, 1 VCOM and 1 VBD for border that can support a maximum display resolution
150x250.
IL3895 embeds booster, regulators and oscillator. Data/Commands are sent from general MCU
through the hardware selectable Serial Peripheral Interface.
2 FEATURES
Design for dot matrix type active matrix EPD display, support mono color for black/white
Resolution: 150 source outputs; 250 gate outputs; 1 VCOM; 1VBD for border
Power supply
VCI:
2.4 to 3.7V
VDDIO: Connect to VCI
VDD: 1.8V, regulate from VCI supply
Gate driving output voltage:
2 levels output (VGH, VGL)
Max 42Vp-p
VGH: 22V
VGL:
-20V
Source / VBD driving output voltage:
3 levels output (VSH, VSS, VSL)
VSH:
15V
VSL:
-15V
VCOM output voltage:
-3V to -0.2V, voltage adjustment in steps of 100mV
Built in VCOM sensing
Source and gate scan direction control
Low current consumption in deep sleep mode
On-chip display RAM
Programmable output waveform allowing flexibility for different applications / environments
On-chip OTP for storing waveform settings
On-chip oscillator
On-chip booster and regulator control for generating VCOM, Gate and Source driving voltage
Serial peripheral and I2C interface available
Available in COG package
Dalian Good Display Co., Ltd.
5 Page IL3895
6.1.3 MCU Serial Peripheral Interface (3-wire SPI)
The 3-wire SPI consists of serial clock SCLK, serial data SDIN and CS#. In SPI mode, D0 acts as SCLK, D1
acts as SDIN. The operation is similar to 4-wire SPI while D/C# pin is not used and it must be tied to LOW.
The control pins status in 3-wire SPI is shown in Table 6-3.
In the write operation, a 9-bit data will be shifted into the shift register on every clock rising edge. The bit
shifting sequence is D/C# bit, D7 bit, D6 bit to D0 bit. The first bit is D/C# bit which determines the following
byte is command or data. When D/C# bit is 0, the following byte is command. When D/C# bit is 1, the
following byte is data. Figure 6-2 shows the write procedure in 3-wire SPI
Table 6-3 : Control pins status of 3-wire SPI
Function
Write command
Write data
SCLK pin
↑
↑
SDIN pin
Command bit
Data bit
Note:
(1) L is connected to VSS and H is connected to VDDIO
(2) ↑ stands for rising edge of signal
D/C# pin
Tie LOW
Tie LOW
CS# pin
L
L
Figure 6-2 : Write procedure in 3-wire SPI
CS#
SDIN/
SCLK
DB1 DB2
DBn
SCLK
(D0)
SDIN(D1)
D/C#
D7
D6
D5
D4
D3
D2
D1
D0
Dalian Good Display Co., Ltd.
11 Page |
Páginas | Total 30 Páginas | |
PDF Descargar | [ Datasheet IL3895.PDF ] |
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