DataSheetWiki


M5K4164ANL-12 fiches techniques PDF

Mitsubishi - 64K-Bit DRAM

Numéro de référence M5K4164ANL-12
Description 64K-Bit DRAM
Fabricant Mitsubishi 
Logo Mitsubishi 





1 Page

No Preview Available !





M5K4164ANL-12 fiche technique
MITSUBISHI-LSls
MsK4164ANL-12, -15
65 536-BIT (65 536-WORD BY I-BIT) DYNAMIC RAM
DESCRIPTION
This is a family of 65536-word by 1-bit dynamic RAMs,
fabricated with the high performance N-channel silicongate
MOS process, and is ideal for large-capacity memory
systems where high speed, low power dissipation, and low
costs are essential_ The use of double-layer polysilicon
process technology and a single-transistor dynamic storage
cell privide high circuit density at reduced costs, and the
use of dynamic circuitry including sense amplifiers assures
low power dissipation_ Multiplexed address inputs permit
both a reduction in pins to the 16-pin zigzag inline package
configuration and an increase in system densities_ The
M5K4164AN L operates on a 5V power supply using
the on-chip substrate bias generator_
PIN CONFIGURATION (TOP VIEW)
I1ADDRESS INPUT A6 -+
!COL~~R~:~~~~i CAS -+ 1]
INO CONNECTIONI NC
§J ~ [._!
DATA OUTPUT
Vss (OV)
WRITE CONTROL
INPUT
W -+
Ao -+
L-,
"91
;...;.
~
L~
,..-
L~
+- D
+- RAS
DATA INPUT
~~~O:~~~~~~
ADDRESS {
INPUTS
-, r :;-0 +-- A2 ADDRESS INPUT
A1 -+ flJ ~ ~:2
A7 --+ 131 ..!. L_
Vee (SV)
-~ UI :-=t-4 +- A }
A4 -+ 151 "-
s ADDRESS
-" D} +- AJ INPUTS
FEATURES
• High speed
Type name
M5K4164ANL-12
M5K4164ANL-15
Access time
lmaxl
Insl
120
150
Cycle time
(min)
Insl
220
260
Power dissipation
Itypl
ImWI
175
150
• 16 pin zigzag inline package
• Single 5V±10% supply
• Low standby power dissipation: 22mW (max)
• Low operating power dissipation:
M5K4164ANL-12 275mW (max)
M5K4164ANL-15 250mW (max)
• Unlatched output enables two-dimensional chip selec-
tion and extended page boundary
• Early-write operation gives common I/O capability
• Read-modify-write, RAS-only refresh, and page-mode
capabil ities
Outline 16P5A
• All input terminals have low input capaciatance and are
directly TTL-compatible
• Output is three-state and directly TTL-compatible
• 128 refresh cycles every 2ms
(16K dynamic RAMs M5K4116P, S compatible)
• CAS controlled output allows hidden refresh
• Output data can be held infinitely by CAS
APPLICATION
• Main memory unit for computers
• Refresh memory for CRT
BLOCK DIAGRAM
DATA INPUT
D
WRITE CONTROL INPUT Vi
COL~rRNo~f9~~3~ CAS
~.g~Mf9~~3f RAS
Vee ISV)
Vss 10V)
ADDRESS INPUTS
Ao
Al
A2
A3
A.
As
A7
MEMORY CELL
164 ROWS X 256 COLUMNSI
SENSE REFRESH AMPLIFIER
MEMORY CELL
164 ROWS X 256 COLUMNSI
COLUMN DECODER
MEMORY CELL
194 ROWS x 256 COLUMNSI
SENSE REFRESH AMPLIFIER
MEMORY CELL
164 ROWS X 256 COLUMNSI
COLUMN DECODER
l-
Sua:
U
..J
0a:
Iz-
u0
g
2 Q DATA PUTPUT
• MITSUBISHI
. . . . ELECTRIC
2-45

PagesPages 10
Télécharger [ M5K4164ANL-12 ]


Fiche technique recommandé

No Description détaillée Fabricant
M5K4164ANL-12 64K-Bit DRAM Mitsubishi
Mitsubishi
M5K4164ANL-15 64K-Bit DRAM Mitsubishi
Mitsubishi

US18650VTC5A

Lithium-Ion Battery

Sony
Sony
TSPC106

PCI Bus Bridge Memory Controller

ATMEL
ATMEL
TP9380

NPN SILICON RF POWER TRANSISTOR

Advanced Semiconductor
Advanced Semiconductor


www.DataSheetWiki.com    |   2020   |   Contactez-nous  |   Recherche