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CAT64LC40 fiches techniques PDF

Catalyst Semiconductor - 1K/2K/4K-Bit SPI Serial E2PROM

Numéro de référence CAT64LC40
Description 1K/2K/4K-Bit SPI Serial E2PROM
Fabricant Catalyst Semiconductor 
Logo Catalyst Semiconductor 





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CAT64LC40 fiche technique
CAT64LC10/20/40
1K/2K/4K-Bit SPI Serial EEPROM
FEATURES
s SPI bus compatible
s Low power CMOS technology
s 2.5V to 6.0V operation
s Self-timed write cycle with auto-clear
s Hardware reset pin
s Hardware and software write protection
ALOGEN FR
LEA D F REETM
s Commercial, industrial and automotive
temperature ranges
s Power-up inadvertant write protection
s RDY/BSY pin for end-of-write indication
s 1,000,000 program/erase cycles
s 100 year data retention
DESCRIPTION
The CAT64LC10/20/40 is a 1K/2K/4K-bit Serial EEPROM
which is configured as 64/128/256 registers by 16 bits.
Each register can be written (or read) serially by using
the DI (or DO) pin. The CAT64LC10/20/40 is
manufactured using Catalyst’s advanced CMOS
EEPROM floating gate technology. It is designed to
endure 1,000,000 program/erase cycles and has a data
retention of 100 years. The device is available in 8-pin
DIP, SOIC and TSSOP packages.
PIN CONFIGURATION
DIP Package (P, L)
SOIC Package (J, W)
CS 1
SK 2
DI 3
DO 4
8 VCC
RDY/BUSY
7 RDY/BUSY
VCC
6 RESET
CS
5 GND
SK
1
2
3
4
8 RESET
7 GND
6 DO
5 DI
TSSOP Package (U, Y)
CS 1
SK 2
DI 3
DO 4
8 VCC
7 RDY/BUSY
6 RESET
5 GND
SOIC Package (S, V)
TSSOP Package (UR, YR)
CS 1
SK 2
DI 3
DO 4
8 VCC
RDY/BUSY 1
7 RDY/BUSY
6 RESET
VCC 2
CS 3
5 GND
SK 4
8 RESET
7 GND
6 DO
5 DI
PIN FUNCTIONS
Pin Name
Function
CS Chip Select
SK Clock Input
DI Serial Data Input
DO Serial Data Output
VCC +2.5V to +6.0V Power Supply
GND
Ground
RESET
Reset
RDY/BUSY
Ready/BUSY Status
© 2004 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
BLOCK DIAGRAM
VCC
GND
MEMORY ARRAY
64/128/256 x 16
ADDRESS
DECODER
DI
RESET
CS
SK
DATA
REGISTER
MODE DECODE
LOGIC
CLOCK
GENERATOR
OUTPUT
BUFFER
DO RDY/BUSY
64LC10/20/40 F02
Doc. No. 1021, Rev. B
1

PagesPages 13
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