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PDF THCV214 Data sheet ( Hoja de datos )
| Número de pieza | THCV214 | |
| Descripción | LVDS SerDes transmitter and receiver | |
| Fabricantes | THine Electronics | |
| Logotipo |  |
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THCV213-214_Rev.2.50_E
THCV213 and THCV214
LVDS SerDes transmitter and receiver
General Description
THCV213 and THCV214 are designed to support
pixel data transmission between the Host and Display.
The chipset can transmit 18bit data and 4bit control
data through only a single differential cable at a pixel
clock frequency from 5MHz to 40MHz.
By V-by-One® technologies, unique encoding
scheme and proprietary CDR technique, a link
synchronization is achieved without any external
frequency reference such as a crystal oscillator. It
drastically improves the cost and space of PCBs of a
display system.
THCV213 transmitter converts input data into a
single LVDS serial data stream with the embedded
clock. It supports pre-emphasis for a long cable
transmission.
THCV214 receiver extracts the clock from the
embedded clock and transforms the serial data stream
back into the parallel data.
Block Diagram
To confirm the reliability of the link, several
functions are supported. THCV213 can transmit the
SYNC pattern which expedites the link establishment.
THCV214 has an indicator of its PLL status.
Features
Transmit 18bit data and 4bit control data via a
single differential cable
Wide frequency range: 5MHz to 40MHz
Support SYNC pattern and LOCK indicator
Pre Emphasis mode
Clock edge selectable
Dual Display mode
Power Down mode
Low power single 3.3V CMOS design
48pin TQFP
AEC-Q100 ESD Protection
EU RoHS Compliant
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1 page  
THCV213-214_Rev.2.50_E
Table1. Output State determined by OE and PDWN (THCV214)
OE PDWN
Output State
L H Normal Operation.
L L All outputs except LOCKN and CLKOUT are held low.
LOCKN is held high.
CLKOUT is driven high when EDGE input is high and is driven low
when EDGE input is low.
H H All outputs are Hi-Z.
H L All outputs are Hi-Z.
Operation Mode
Normal
Shake Hand
Table2. Requirements for DE input
DE = High
DE = Low
Min. 2tTCIP (See Fig. 5 for tTCIP )
Max. 80usec
Min. 50tTCIP (See Fig. 5 for tTCIP )
Min. 2tTCIP (See Fig. 5 for tTCIP )
Min. 2tTCIP (See Fig. 5 for tTCIP )
Absolute Maximum Ratings
Parameter
Supply Voltage (VDD)
CMOS/TTL Input Voltage
CMOS/TTL Output Voltage
LVDS Receiver Input Voltage
Output Current
Junction Temperature
Storage Temperature Range
Reflow Peak Temperature / Time
Maximum Power Dissipation @+25°C
ESD Protection AEC-Q100-002(HBM)
ESD Protection AEC-Q100-003(MM)
ESD Protection AEC-Q100-011(CDM) (Corner.750)
Min
-0.3
-0.3
-0.3
-0.3
-30
-
-55
-
-
-
-
-
Typ
-
-
-
-
-
-
-
-
-
±2
±200
±500
Max
4.0
VDD +0.3
VDD +0.3
VDD +0.3
30
125
125
260/10
1.9
-
-
-
Unit
V
V
V
V
mA
°C
°C
°C/sec
W
kV
V
V
Operation Condition
Parameter
Supply Voltage
Operating Ambient Temperature
Consumer
Min Typ Max
3.0 3.3 3.6
0 - 70
Industrial
Min Typ Max
3.0 3.3 3.6
-40 - 85
Unit
V
°C
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THCV213-214_Rev.2.50_E
Fig. 5 Transmitter Output Timing (THCV213)
RXIN+/-
tRCIP
Stop Start
#19 #1 #2 #3
Stop Start
#18 #19
#1 #2 #3
Stop Start
#18 #19
#1
tRO
CLKOUT
D17-D0
SYNC2-SYNC0
DE
tRCH
tRCP
VDD/2
tRCL
VDD/2
VDD/2
tRS tRH
Fig. 6 Receiver Output Timing (THCV214)
Solid line: EDGE=”HIGH”
Dashed line: EDGE=”LOW”
Copyright©2015 THine Electronics, Inc.
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11 Page | ||
| Páginas | Total 19 Páginas | |
| PDF Descargar | [ Datasheet THCV214.PDF ] | |
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