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PDF KAD5514P Data sheet ( Hoja de datos )
| Número de pieza | KAD5514P | |
| Descripción | 250/210/170/125MSPS ADC | |
| Fabricantes | Intersil | |
| Logotipo |  |
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DATASHEET
14-Bit, 250/210/170/125MSPS ADC
KAD5514P
The KAD5514P is a family of low-power, high performance
14-bit, analog-to-digital converters. Designed with Intersil’s
proprietary FemtoCharge™ technology on a standard CMOS
process, the family supports sampling rates of up to
250MSPS. The KAD5514P is part of a pin-compatible portfolio
of 10, 12 and 14-bit A/Ds with sample rates ranging from
125MSPS to 500MSPS.
A Serial Peripheral Interface (SPI) port allows for extensive
configurability, as well as fine control of various parameters
such as gain and offset.
Digital output data is presented in selectable LVDS or CMOS
formats. The KAD5514P is available in 72 Ld and 48 Ld QFN
packages with an exposed paddle. Operating from a 1.8V
supply, performance is specified across the full industrial
temperature range (-40°C to +85°C).
Key Specifications
• SNR = 69.4dBFS for fIN = 105MHz (-1dBFS)
• SFDR = 82.2dBc for fIN = 105MHz (-1dBFS)
• Total Power Consumption
- 429/345mW at 250/125MSPS (SDR Mode)
- 390/309mW at 250/125MSPS (DDR Mode)
Features
• Programmable gain, offset and skew control
• 950MHz analog input bandwidth
• 60fs clock jitter
• Over-range indicator
• Selectable clock divider: ÷1, ÷2 or ÷4
• Clock phase selection
• Nap and sleep modes
• Two’s complement, gray code or binary data format
• DDR LVDS-compatible or LVCMOS outputs
• Programmable built-in test patterns
• Single-supply 1.8V operation
• Pb-free (RoHS compliant)
Applications
• Power amplifier linearization
• Radar and satellite antenna array processing
• Broadband communications
• High-performance data acquisition
• Communications test equipment
• WiMAX and microwave receivers
May 31, 2016
FN6804.3
CLKP
CLKN
V IN P
VINN
VCM
CLOCK
G E N E R A T IO N
SHA
1.25V
+
–
1 4 -B IT
250 MSPS
ADC
SPI
CONTROL
DIGITAL
ERROR
C O R R E C T IO N
L V D S /C M O S
D R IV E R S
CLKOUTP
CLKOUTN
D[13:0]P
D[13:0]N
ORP
ORN
OUTFMT
OUTMODE
FIGURE 1. BLOCK DIAGRAM
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2008, 2009, 2016. All Rights Reserved
Intersil (and design) and FemtoCharge are trademarks owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
1 page  
KAD5514P
Electrical Specifications All specifications apply under the following conditions unless otherwise noted: AVDD = 1.8V, OVDD = 1.8V,
TA = -40°C to +85°C (typical specifications at +25°C), AIN = -1dBFS, fSAMPLE = maximum conversion rate (per speed grade). (Continued)
PARAMETER
TEST
SYMBOL CONDITIONS
KAD5514P-25
(Note 8)
MIN TYP MAX
KAD5514P-21
(Note 8)
MIN TYP MAX
KAD5514P-17
(Note 8)
MIN TYP MAX
KAD5514P-12
(Note 8)
MIN TYP MAX
UNIT
Total Power Dissipation
Normal Mode (SDR)
Normal Mode (DDR)
Nap Mode
Sleep Mode
PD 3mA LVDS
PD 3mA LVDS
PD
PD CSB at logic
high
429 463
390
148 170.2
26
402 433
363
142 164.2
26
378 406
339
136 158.2
26
345 376 mW
309 mW
129 150.2 mW
2 6 mW
Nap Mode Wake-Up
Time (Note 6)
Sample Clock
Running
1
1
1 1 µs
Sleep Mode Wake-Up
Time (Note 6)
Sample Clock
Running
1
1
1 1 ms
AC SPECIFICATIONS
Differential
Nonlinearity
DNL
-1.0 ±0.3 1.0 -1.0 ±0.3 1.0 -1.0 ±0.3 1.0 -1.0 ±0.3 1.0 LSB
Integral Nonlinearity
INL
±3.5
±3.5
±3.5
±5.0
LSB
Minimum Conversion fS MIN
Rate (Note 7)
40 40
40 40 MSPS
Maximum Conversion fS MAX
Rate
250 210 170 125 MSPS
Signal-to-Noise Ratio
SNR fIN = 10MHz
69.5
fIN = 105MHz 66.9 69.4
70.2
67.4 70.2
70.6
68.1 70.4
70.9
68. 70.7
4
dBFS
dBFS
Signal-to-Noise and
Distortion
Effective Number of
Bits
SINAD
ENOB
fIN = 190MHz
fIN = 364MHz
fIN = 695MHz
fIN = 995MHz
fIN = 10MHz
fIN = 105MHz
fIN = 190MHz
fIN = 364MHz
fIN = 695MHz
fIN = 995MHz
fIN = 10MHz
fIN = 105MHz
66.4
10.8
68.9
67.6
64.9
62.6
69.4
69.1
68.4
66.7
59.0
48.2
11.2
11.2
69.4
68.1
65.1
62.9
70.2
66.9 70.2
69.1
67.0
58.9
48.2
11.4
10.9 11.4
70.0
68.9
66.3
64.1
70.5
67.6 70.1
69.4
67.6
60.1
49.1
11.4
11.0 11.4
70.1
68.7
65.7
63.4
70.7
67.6 70.3
69.7
67.6
59.9
50.4
11.5
11. 11.4
0
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
Bits
Bits
fIN = 190MHz
fIN = 364MHz
fIN = 695MHz
fIN = 995MHz
11.1
10.8
9.5
7.7
11.2
10.8
9.5
7.7
11.2
10.9
9.7
7.9
11.3
10.9
9.7
8.1
Bits
Bits
Bits
Bits
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5
FN6804.3
May 31, 2016
5 Page 
Pin Configuration
KAD5514P
KAD5514P
(72 LD QFN)
TOP VIEW
72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55
AVDD 1
DNC 2
DNC 3
DNC 4
DNC 5
AVDD 6
AVSS 7
AVSS 8
VINN 9
VINP 10
AVSS 11
AVDD 12
DNC 13
DNC 14
VCM 15
CLKDIV 16
DNC 17
DNC 18
EXPOSED PADDLE
CONNECT THERMAL PAD TO AVSS
54 D10P
53 D10N
52 D9P
51 D9N
50 D8P
49 D8N
48 CLKOUTP
47 CLKOUTN
46 RLVDS
45 OVSS
44 D7P
43 D7N
42 D6P
41 D6N
40 D5P
39 D5N
38 D4P
37 D4N
19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36
Submit Document Feedback 11
FN6804.3
May 31, 2016
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet KAD5514P.PDF ] | |
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