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PDF HIP6311A Data sheet ( Hoja de datos )
| Número de pieza | HIP6311A | |
| Descripción | Microprocessor CORE Voltage Regulator Multi-Phase Buck PWM Controller | |
| Fabricantes | Intersil | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de HIP6311A (archivo pdf) en la parte inferior de esta página. Total 16 Páginas | ||
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Data Sheet
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HIP6311A
FN9035.1
Microprocessor CORE Voltage Regulator
Multi-Phase Buck PWM Controller
The HIP6311A Multi-Phase Buck PWM control IC together
with HIP6601A, HIP6602A or HIP6603A companion gate
drivers form a precision voltage regulation system for
advanced microprocessors. The HIP6311A controls
microprocessor core voltage regulation by driving 2 to 4
synchronous-rectified buck channels in parallel. The multi-
phase buck topology takes advantage of interleaving phases
to increase ripple frequency and reduce input and output
ripple currents. Resulting in fewer components, reduced
component ratings, lower power dissipation, and smaller
implementation area.
The HIP6311A control IC features a 5 bit digital-to-analog
converter (DAC) that adjusts the core output voltage from
1.100V to 1.850V with an unsurpassed system accuracy of
±0.5% over temperature. The HIP6311A uses a lossless
current sensing approach in which the voltage developed
across the on-resistance of the lower MOSFETs during
conduction is sampled. Current sensing provides the
required signals for precision droop, channel-current
balancing, load sharing, and over-current protection.
Another feature of this control IC is the PGOOD monitor
which is held low until the core voltage increases to within
8% of the programmed voltage. An over-voltage condition is
detected when the output voltage exceeds 115% of the
programmed VID. This results in the converter shutting down
and PGOOD being pulled low. During an under-voltage
condition (output voltage 10% below the programmed VID),
PGOOD transitions low, but the converter continues to
operate.
Features
• Precision CORE Voltage Regulation
- ±0.5% System Accuracy Over Temperature
• Microprocessor Voltage Identification Input
- 5-Bit VID Input
- 1.100V to 1.850V in 25mV Steps
- Programmable Droop Voltage
• RDS(on) Current Sensing
- Accurate Channel Current Balancing
- Loss less Current Sampling
- Low-Cost Implementation
• Fast Transient Response
• Digital Soft Start
• Over Current Protection
• Selection of 2, 3, or 4 Phase Operation
• 50kHz to 1.5MHz Switching Frequency
• Pb-free available
Applications
• Desktop Motherboards
• Voltage Regulator Modules
• Servers and Workstations
Pinout
HIP6311A (SOIC)
TOP VIEW
Ordering Information
PART NUMBER TEMP. (oC) PACKAGE PKG. NO.
HIP6311ACB
0 to 70 20 Ld SOIC M20.3
HIP6311ACBZ
(See Note)
0 to 70
20 Ld SOIC
(Pb-free)
M20.3
HIP6311ACBZA
(See Note)
0 to 70
20 Ld SOIC
(Pb-free)
M20.3
*Add “-T” suffix to part number for tape and reel packaging.
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which is compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J Std-020B.
VID4 1
VID3 2
VID2 3
VID1 4
VID0 5
COMP 6
FB 7
FS/DIS 8
GND 9
VSEN 10
20 VCC
19 PGOOD
18 PWM4
17 ISEN4
16 ISEN1
15 PWM1
14 PWM2
13 ISEN2
12 ISEN3
11 PWM3
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2001, 2004, All Rights Reserved
1 page  
HIP6311A
Typical Application - 4 Phase Converter Using HIP6602 Gate Drivers
+5V
PGOOD
VID4
VID3
VID2
VID1
VID0
FB
VSEN
COMP
VCC
ISEN1
PWM1
PWM2
ISEN2
MAIN
CONTROL
HIP6311A
FS/DIS
ISEN3
PWM3
PWM4
GND ISEN4
+12V
VCC
BOOT1
VIN = +12V
UGATE1
PHASE1
LGATE1
DUAL
DRIVER
HIP6602
PVCC
BOOT2
+5V
VIN +12V
PWM1
PWM2
UGATE2
PHASE2
LGATE2
GND
+12V
VCC
BOOT3
VIN+12V
UGATE3
PHASE3
LGATE3
DUAL
DRIVER
HIP6602
PVCC
BOOT4
+5V
VIN +12V
PWM3
PWM4
UGATE4
PHASE4
LGATE4
GND
L01
L02
L03
L04
5
+VCORE
5 Page 
HIP6311A
RIN
RFB Cc
FB COMP
HIP6311A
ERROR
AMPLIFIER
-
+
SAWTOOTH
GENERATOR
CORRECTION
+
-
COMPARATOR
- PWM
+ CIRCUIT
REFERENCE
DAC
DIFFERENCE
+
TO OTHER
CHANNELS
-
CURRENT
SENSING
CURRENT
SENSING
FROM
OTHER
CHANNELS
AVERAGING
PWM
ISEN
TO OVER
CURRENT
TRIP
+
-
COMPARATOR
REFERENCE
VIN
HIP6601
Q1 L01
IL
Q2
PHASE
RISEN
ONLY ONE OUTPUT
STAGE SHOWN
INDUCTOR
CURRENT(S)
FROM
OTHER
CHANNELS
VCORE
FIGURE 7. SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM SHOWING CURRENT AND VOLTAGE SAMPLING
Current Sensing and Balancing
Overview
The HIP6311A samples the on-state voltage drop across
each synchronous rectifier FET, Q2, as an indication of the
inductor current in that phase, see Figure 7. Neglecting AC
effects (to be discussed later), the voltage drop across Q2 is
simply rDS(ON)(Q2) x inductor current (IL). Note that IL, the
inductor current, is either 1/2, 1/3, or 1/4 of the total current
(ILT), depending on how many phases are in use.
The voltage at Q2’s drain, the PHASE node, is applied to the
RISEN resistor to develop the IISEN current to the HIP6311A
ISEN pin. This pin is held at virtual ground, so the current
through RISEN is IL x rDS(ON)(Q2) / RISEN.
The IISEN current provides information to perform the
following functions:
1. Detection of an over-current condition
2. Reduce the regulator output voltage with increasing load
current (droop)
3. Balance the IL currents in multiple channels
Over-Current, Selecting RISEN
The current detected through the RISEN resistor is averaged
with the current(s) detected in the other 1, 2, or 3 channels. The
averaged current is compared with a trimmed, internally gener-
ated current, and used to detect an over-current condition.
The nominal current through the RISEN resistor should be
50A at full output load current, and the nominal trip point for
over-current detection is 165% of that value, or 82.5A.
Therefore, RISEN = IL x rDS(ON) (Q2) / 50A.
For a full load of 25A per phase, and an rDS(ON) (Q2) of
4m, RISEN = 2k.
The over-current trip point would be 165% of 25A, or ~ 41A
per phase. The RISEN value can be adjusted to change the
over-current trip point, but it is suggested to stay within
25%of nominal.
Droop, Selection of RIN
The average of the currents detected through the RISEN
resistors is also steered to the FB pin. There is no DC return
path connected to the FB pin except for RIN, so the average
current creates a voltage drop across RIN. This drop
increases the apparent VCORE voltage with increasing load
current, causing the system to decrease VCORE to maintain
balance at the FB pin. This is the desired “droop” voltage used
to maintain VCORE within limits under transient conditions.
With a high dv/dt load transient, typical of high performance
microprocessors, the largest deviations in output voltage
11
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet HIP6311A.PDF ] | |
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