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PDF THC63LVD104A Data sheet ( Hoja de datos )
| Número de pieza | THC63LVD104A | |
| Descripción | 90MHz 30Bits COLOR LVDS Receiver | |
| Fabricantes | THine Electronics | |
| Logotipo |  |
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THC63LVD104A Rev.1.0
THC63LVD104A
90MHz 30Bits COLOR LVDS Receiver
THine
General Description
The THC63LVD104A receiver is designed to support
pixel data transmission between Host and Flat Panel
Display from NTSC up to WXGA resolutions. The
THC63LVD104A converts the LVDS data streams back
into 35bits of CMOS/TTL data with rising edge or fall-
ing edge clock for convenient with a variety of LCD
panel controllers.At a transmit clock frequency of
90MHz, 30bits of RGB data and 5bits of timing and
control data (HSYNC,VSYNC,DE,CNTL1,CNTL2)
are transmitted at an effective rate of 630Mbps per
LVDS channel.Using a 90MHz clock, the data through-
put is 394Mbytes per second.
Features
• Wide dot clock range: 8-90MHz suited for NTSC,
VGA, SVGA, XGA, and WXGA
• PLL requires no external components
• 50% output clock duty cycle
• TTL clock edge programmable
• Power down mode
• Low power single 3.3V CMOS design
• 64pin TQFP
• Backward compatible with THC63LVDF64x
(18bits) / F84x(24bits)
Block Diagram
LVDS INPUT
RA+/-
RB+/-
RC+/-
RD+/-
RE+/-
RCLK+/-
(8 to90MHz)
CMOS/TTL INPUT
TEST
PD
OE
R/F
PLL
Copyright 2003 THine Electronics, Inc. All rights reserved
1
CMOS/TTL OUTPUT
7 RA6-RA0
7 RB6-RB0
7 RC6-RC0
7 RD6-RD0
7 RE6-RE0
CLKOUT
THine Electronics, Inc.
1 page  
THC63LVD104A Rev.1.0
Supply Current
Symbol
IRCCG
IRCCW
IRCCS
Parameter
Receiver Supply
Current
(Gray Scale Pattern)
Receiver Supply
Current
(Checker Pattern)
Receiver Power Down
Supply Current
THine
Conditions
VCC = 3.0V ~ 3.6V, Ta = 0 °C ~ +70 °C
Typ. Max. Units
fCLKOUT = 90MHz
CL=8pF,
Vcc=3.3V
70 mA
fCLKOUT = 90MHz
PD = L
CL=8pF,
Vcc=3.3V
112 mA
10 µA
Copyright 2003 THine Electronics, Inc. All rights reserved
5
THine Electronics, Inc.
5 Page 
THC63LVD104A Rev.1.0
AC Timing Diagrams
LVDS Inputs
THine
RCLK+
(Differential)
Vdiff = 0V
Vdiff = 0V
RA+/-
RA3’ RA2’ RA1’ RA0’ RA6 RA5 RA4 RA3 RA2 RA1 RA0 RA6’’
RB+/-
RB3’ RB2’ RB1’ RB0’ RB6 RB5 RB4 RB3 RB2 RB1 RB0 RB6’’
RC+/-
RC3’ RC2’ RC1’ RC0’ RC6 RC5 RC4 RC3 RC2 RC1 RC0 RC6’’
RD+/-
RD3’ RD2’ RD1’ RD0’ RD6 RD5 RD4 RD3 RD2 RD1 RD0 RD6’’
RE+/-
RE3’ RE2’ RE1’ RE0’ RE6 RE5 RE4 RE3 RE2 RE1 RE0 RE6’’
Previous Cycle
tRIP1
tRIP0
tRIP6
tRIP5
tRIP4
tRIP3
tRIP2
Current Cycle
Next Cycle
Copyright 2003 THine Electronics, Inc. All rights reserved
11
THine Electronics, Inc.
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet THC63LVD104A.PDF ] | |
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