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PDF ZSSC3018 Data sheet ( Hoja de datos )
| Número de pieza | ZSSC3018 | |
| Descripción | High Resolution 18-Bit Sensor Signal Conditioner | |
| Fabricantes | IDT | |
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Versatile, High Resolution 18-Bit
Sensor Signal Conditioner
ZSSC3018
Datasheet
Brief Description
The ZSSC3018 is a sensor signal conditioner (SSC) integrated
circuit for high-accuracy amplification and analog-to-digital
conversion of differential or pseudo-differential input signals.
Designed for high-resolution sensor module applications, the
ZSSC3018 can perform offset, span, and 1st and 2nd order
temperature compensation of the measured signal. Developed for
correction of resistive bridge or absolute voltage sensors, it can
also provide a corrected temperature output measured with an
internal sensor.
The measured and corrected sensor values are provided at the
digital output pins, which can be configured as I2C (≤ 3.4MHz) or
SPI (≤ 10MHz). Digital compensation of signal offset, sensitivity,
temperature, and non-linearity is accomplished via a 26-bit
internal digital signal processor (DSP) running a correction
algorithm. Calibration coefficients are stored on-chip in a highly
reliable, non-volatile, multiple-time programmable (MTP) memory.
Programming the ZSSC3018 is simple via the serial interface. The
interface is used for the PC-controlled calibration procedure,
which programs the set of calibration coefficients in memory. The
ZSSC3018 provides accelerated signal processing, increased
resolution, and improved noise immunity in order to support high-
speed control, safety, and real-time sensing applications with the
highest requirements for energy efficiency.
Features
Flexible, programmable analog front-end design; up to 18-bit
analog-to-digital converter (ADC)
Fully programmable gain amplifier with gain range from 6.6 to
216 (linear)
Internal auto-compensated temperature sensor
Digital compensation of individual sensor offset; 1st and 2nd
order digital compensation of sensor gain as well as of 1st
and 2nd order temperature gain and offset drift
Programmable interrupt operation
High-speed sensing: e.g., 16-bit conditioned sensor signal
measurement rate >500s-1
Typical sensor system can achieve an accuracy of better than
±0.10% FSO* @ -40 to 125°C
Benefits
Integrated 26-bit calibration math DSP
Fully corrected signal at digital output
Layout customized for die-die bonding with sensor for high-
density chip-on-board assembly
One-pass calibration minimizes calibration costs
No external trimming, filter, or buffering components required
Highly integrated CMOS design
Integrated reprogrammable non-volatile memory
Excellent for low-voltage and low-power battery applications
Optimized for operation in calibrated resistive sensor
(e.g., pressure) or calibrated absolute voltage sensor
(e.g., thermopile) modules
Physical Characteristics
Supply voltage range: 1.68V to 3.6V
Current consumption: ~1.0mA (typical) in operating mode
Sleep Mode current: 50nA (typical) at 125°C; 20nA (typical)
at 85°C
Temperature resolution: <0.003K/LSB
Best-in-class energy-efficiency:
with 16-bit resolution: <140pJ/step
with 18-bit resolution: <50pJ/step
Operation temperature: –40°C to +125°C
Delivery options: die or 24-PQFN (4 x 4 mm) package
* FSO = Full Scale Output.
ZSSC3018 Application Example
Sensor Bridge
ZSSC3018
24-PQFN
VDD
GND
EOC
MISO
MOSI/SDA
SCLK/SCL
SS
© 2017 Integrated Device Technology, Inc
1
January 10, 2017
1 page  
ZSSC3018 Datasheet
List of Tables
Table 1.1 Absolute Maximum Ratings ...............................................................................................................................................................6
Table 1.2 Operating Conditions .........................................................................................................................................................................6
Table 1.3 Requirements for VDD Power-on Reset (POR) .................................................................................................................................7
Table 1.4 Electrical Parameters.........................................................................................................................................................................7
Table 2.1 Amplifier Gain: Stage 1 ....................................................................................................................................................................12
Table 2.2 Amplifier Gain: Stage 2 ....................................................................................................................................................................12
Table 2.3 Gain Polarity ....................................................................................................................................................................................13
Table 2.4 ADC Conversion Times for a Single A2D Conversion .....................................................................................................................13
Table 2.5 ADC Offset Shift...............................................................................................................................................................................14
Table 2.6 Typical Conversion Times versus Noise Performance with Full Sensor Signal Conditioning for Measurement Including AZSM,
SM, AZTM, and TM (Bridge-Type Sensor) ......................................................................................................................................14
Table 3.1 SPI/I2C Commands ..........................................................................................................................................................................23
Table 3.2 Get_Raw Commands.......................................................................................................................................................................25
Table 3.3 General Status Byte.........................................................................................................................................................................26
Table 3.4 Mode Status.....................................................................................................................................................................................26
Table 3.5 MTP Memory Content Assignments ................................................................................................................................................31
Table 3.6 Measurement Results of ADC Raw Measurement Request (Two’s Complement) ..........................................................................45
Table 3.7 Calibration Coefficients (Factors and Summands) in Memory (Sign-Magnitude) ............................................................................45
Table 3.8 Output Results from SSC-Correction Math or DSP—Sensor and Temperature ..............................................................................45
Table 3.9 Interrupt Thresholds TRSH1 and TRSH2—Format as for SSC-Correction Math Output.................................................................45
Table 4.1 24-PQFN Dimensions (4 x 4 mm) ....................................................................................................................................................46
Table 4.2 Pin Assignments 24-PQFN ..............................................................................................................................................................47
© 2017 Integrated Device Technology, Inc
5
January 10, 2017
5 Page 
ZSSC3018 Datasheet
Figure 2.2 ZSSC3018 Functional Block Diagram, Voltage-Source-Sensor
VDDB
VTP Temperature
Reference
VTN Sensor
AGND / CM
Generator
ZSSC3018
Vreg int
Bias Current
Generator
Voltage Regulator
Power Ctr.
VDD
VSS
INP
INN
VSSB
MUX
PGA
Pre-Amplifier
Power-ON
Reset
Clock Generator
Oscillator
Analog
Digital
AADCD
1818bBitit
System
Control Unit
DSP Core
(Calculations,
Communication)
EOC
SCLK/SCL
SPI
SS
MOSI/SDA
MISO
MTP I²C RES
Interface
Functionality Support
The amplifier consists of two stages with programmable gain values.
The ZSSC3018 employs a programmable analog-to-digital converter (ADC) optimized for conversion speed and noise suppression. The
programmable resolution from 12 to 18 bits provides flexibility for adapting the conversion characteristics. To improve power supply noise
suppression, the ADC uses the bridge supply VDDB as its reference voltage leading to a ratiometric measurement topology if the external
sensor is a bridge-type element.
The remaining IC-internal offset and the sensor element offset, i.e., the overall system offset for the amplifier and ADC, can be canceled by
means of an offset and auto-zero measurement, respectively.
The DSP accomplishes the auto-zero, span, and 1st and 2nd order temperature compensation of the measured external sensor signal. The
correction coefficients are stored in the MTP memory.
The ZSSC3018 supports SPI and I2C interface communication for controlling the ZSSC3018, configuration, and measurement result output.
© 2017 Integrated Device Technology, Inc
11
January 10, 2017
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet ZSSC3018.PDF ] | |
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