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PDF NJU6627 Data sheet ( Hoja de datos )
| Número de pieza | NJU6627 | |
| Descripción | 10-CHARACTER 3-LINE DOT MATRIX LCD CONTROLLER DRIVER | |
| Fabricantes | New Japan Radio | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de NJU6627 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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NJU6627
Preliminary
10-CHARACTER 3-LINE DOT MATRIX LCD
CONTROLLER DRIVER with KEYSCAN FUNCTION
GENERAL DESCRIPTION
The NJU6627 is a Dot Matrix LCD controller driver for
10-character 3-line with icon display in single chip.
It contains voltage converter and regulator bleeder
resistance, Keyscan circuit, CR oscillator, microprocessor
interface circuit, instruction decoder controller, character
generator ROM/RAM, high voltage operation common and
segment drivers, and others.
The character generator ROM consisting of 7,840bits stores
224 kinds of character font, Each 1,120 bits CG RAM and
Icon display RAM can store 32 kind of special character
displayed on the dot matrix display area or 100 kinds of Icon
display area.
The 23-common(21 for character, 2 for Icon) and
50-segment drivers operate 10-character 3-line with 100
Icon LCD display.
The 16th display contrast control function is incorporated.
Therefore, only simple power supply circuit on chip operates
the contrast adjustment easily.
The complete CR oscillator requires external capacitor and
resistor.
The serial interface which operates by 1MHz, communicates
with external MCU.
PACKAGE OUTLINE
NJU6627C
FEATURES
10-character 3-line Dot Matrix LCD Controller Driver
Maximum 100 Icon Display
Serial Direct Interface with Microprocessor
Display Data RAM
30 x 8 bits
:Maximum 10-character 3-line Display
Character Generator ROM
7,840bits
:224 Characters for 5 x 7 Dots
Character Generator RAM
Icon Display RAM
1,120bits
:32 Patterns (5 x 7 Dots)
Maximum 100-Icons
High voltage LCD Driver
23-common / 50-segment
Duty and Bias Ratio
1/23, 1/16 duty, 1/5 bias
Useful Instruction set Clear Display, Address Home, Display ON/OFF, Display blink,
Address shift, Character Shift, Keyscan ON/OFF cont. e.t.c.
24-Key input(4x6 Keyscan)
Power on Initialization / Hardware Reset
Bleeder resistance on chip
Software contrast control(16-step)
Voltage Booster Circuits (2-time)
Oscillation Circuit on-chip (External CR)
Operating Voltage
4.5 to 5.5V
Package Outline
C-MOS Technology
Bare Chip
Ver.2013-12-25
-1-
1 page  
NJU6627
TERMINAL DESCRIPTION
Preliminary
No. SYMBOL
10 VDD
17 VSS
9 VCI
6 VOUT
5 VLCD
4 V1
3 V2
2 V3
1 V4
7 C1+
8 C1-
11 OSC1
15 CSb
14 SCL
13 DATA
16 RESETb
12
18-23
24-27
36-85
94-100
29-35
87-93
96
REQ
K1-K6
S1-S4
SEG1-SEG50
COM1-COM21
COMMK1
COMMK2
I/O F U N C T I O N
- Power Source :VDD=+5V, GND :VSS=0V
I Input terminal for voltage doubler
O Voltage doubler output terminal.
LCD driving voltage stabilization capacitor terminals.
I Connect the capacitor between VSS.
typ. : 0.1uF
Boosted capacitor connecting terminals used for voltage booster.
I
Resistor connection terminal for oscillation
/ External clock input terminal
I Chip select signal input of serial I/F.
I Shift clock input of serial I/F.
I/O Serial data input of serial I/F.
Reset terminal
I When the "L" level is input over than 900us to this terminal,
the system will be reset ( at fOSC 200KHz ).
O Key request signal output terminal.
I Key scanning input terminals.
O Key scanning output terminals.
O LCD segment driving signal output terminals.
O LCD common driving signal output terminals.
O LCD Icon common driving signal output terminals.
Ver.2013-12-25
-5-
5 Page 
NJU6627
Preliminary
(1-9) Keyscan circuit
The Keyscan circuit consists of a detector block of key pressing and a fetching block of key status. It
scans 4x6 key matrix and fetches conditions of 24 keys. Furthermore, it operates correctly against the
key roll over input.
Key matrix
NJU6627
S4 S3 S2 S1 K6 K5 K4 K3 K2 K1
ON
OFF
(1-10) Timing of Key scan
Key scan cycle is 64 x T[s]. The data of key scan is a result of comparison with a couple of Key scan
for correct judge whether Key On or Off. When the result of comparison is correct (accord), the NJU6627
recognizes Key On and outputs “L” level from SO terminal after 128 x T[s] from start of Key scan for a
request to read key data out to external CPU. When the REQ terminals outputs “H” signal, the key
scan does not operate until end of key data reading by CPU, and scanned key data is kept. When the
result of comparison is incorrect (not accord), Key scan operates again if any key is On. Therefore,
Key scan may operate incorrectly in case of shorter period of Key on than 128 x T[s]
Key turn ON
64 x T[s]
S1 1
1
S2 2
2
S3 3 3
S4 4 4
REQ
128 x T [s]
T=1/ fosc
Request signal output
When the NJU6627 detect the key-in to scan start by the key scan circuit, it outputs “H” signal as the
request signal from the “REQ” terminal to notice the key pressing information to an application system.
The request signal resets to “L” level after Keyscan data read.
Contents of key register renewal
Contents of key register are no fixed in case of no key operation.
Contents of key register are not changed in busy of key data reading operation.
It stops when a couple of data by continuously twice key scan operations are accorded and fixed as a
correct key status. The correct key status data is stored and newly key scan operation does not start
until external CPU reads data out after key status is fixed.
When a key on the key matrix is pressed, the bit corresponding to terminals (S1 to S4, K1 to K6)
connected the switch goes to “1” and another bits go to “0”.
In case of Example 1, when the switch connecting to K2 and S3 is pressed, bit (D1) corresponding to
S3 and K2 go to “1” but another bits go to “0”.
Ver.2013-12-25
- 11 -
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet NJU6627.PDF ] | |
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