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PDF ADuM120N Data sheet ( Hoja de datos )

Número de pieza ADuM120N
Descripción Dual-Channel Digital Isolators
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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Data Sheet
3.0 kV rms,
Dual-Channel Digital Isolators
ADuM120N/ADuM121N
FEATURES
High common-mode transient immunity: 100 kV/µs typical
High robustness to radiated and conducted noise
Low propagation delay
13 ns maximum for 5 V operation
15 ns maximum for 1.8 V operation
150 Mbps minimum data rate
Safety and regulatory approvals (pending)
UL recognition: 3000 V rms for 1 minute per UL 1577
CSA Component Acceptance Notice 5A
VDE certificate of conformity
DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
VIORM = 565 V peak
CQC certification per GB4943.1-2011
Backward compatibility
ADuM120N0 pin-compatible with ADuM1285
ADuM120N1 pin-compatible with ADuM1280 and
ADuM1200
ADuM121N0 pin-compatible with ADuM1286
ADuM121N1 pin-compatible with ADuM1281 and
ADuM1201
Low dynamic power consumption
1.8 V to 5 V level translation
High temperature operation: 125°C
Failsafe high or low options
8-lead, RoHS-compliant, SOIC package
Qualified for automotive applications
APPLICATIONS
General-purpose multichannel isolation
Industrial field bus isolation
GENERAL DESCRIPTION
The ADuM120N/ADuM121N1 are dual-channel digital isolators
based on Analog Devices, Inc., iCoupler® technology. Combining
high speed, complementary metal-oxide semiconductor (CMOS)
and monolithic air core transformer technology, these isolation
components provide outstanding performance characteristics
superior to alternatives such as optocoupler devices and other
integrated couplers. The maximum propagation delay is 13 ns
with a pulse width distortion of less than 3 ns at 5 V operation.
Channel matching is tight at 3.0 ns maximum.
The ADuM120N/ADuM121N data channels are independent and
are available in a variety of configurations with a withstand voltage
rating of 3 kV rms (see the Ordering Guide). The devices operate
with the supply voltage on either side ranging from 1.8 V to 5 V,
FUNCTIONAL BLOCK DIAGRAMS
ADuM120N
VDD1 1
8 VDD2
VIA 2
ENCODE
DECODE
7 VOA
VIB 3
ENCODE
DECODE
6 VOB
GND1 4
5 GND2
Figure 1. ADuM120N Functional Block Diagram
ADuM121N
VDD1 1
8 VDD2
VOA 2
DECODE
ENCODE
7 VIA
VIB 3
ENCODE
DECODE
6 VOB
GND1 4
5 GND2
Figure 2. ADuM121N Functional Block Diagram
providing compatibility with lower voltage systems as well as
enabling voltage translation functionality across the isolation
barrier.
Unlike other optocoupler alternatives, dc correctness is ensured in
the absence of input logic transitions. Two different fail-safe options
are available in which the outputs transition to a predetermined
state when the input power supply is not applied or the inputs
are disabled.
The ADuM120N0 is pin-compatible with the ADuM1285, and
the ADuM120N1 is pin-compatible with the ADuM1280 and
the ADuM1200. The ADuM121N0 is pin-compatible with
ADuM1286, and the ADuM121N1 is pin-compatible with the
ADuM1281 and the ADuM1201.
1 Protected by U.S. Patents 5,952,849; 6,873,065; 6,903,578; and 7,075,329. Other patents are pending.
Rev. B
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com

1 page




ADuM120N pdf
Data Sheet
ADuM120N/ADuM121N
ELECTRICAL CHARACTERISTICS—3.3 V OPERATION
All typical specifications are at TA = 25°C, VDD1 = VDD2 = 3.3 V. Minimum/maximum specifications apply over the entire recommended
operation range: 3.0 V ≤ VDD1 ≤ 3.6 V, 3.0 V ≤ VDD2 ≤ 3.6 V, and −40°C ≤ TA ≤ +125°C, unless otherwise noted. Switching specifications
are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted. Supply currents are specified with 50% duty cycle signals.
Table 3.
Parameter
SWITCHING SPECIFICATIONS
Pulse Width
Data Rate
Propagation Delay
Pulse Width Distortion
Change vs. Temperature
Propagation Delay Skew
Channel Matching
Codirectional
Opposing Direction
Jitter
DC SPECIFICATIONS
Input Threshold Voltage
Logic High
Logic Low
Output Voltage
Logic High
Logic Low
Input Current per Channel
Quiescent Supply Current
ADuM120N
ADuM121N
Dynamic Supply Current
Dynamic Input
Dynamic Output
Undervoltage Lockout
Positive VDDx Threshold
Negative VDDx Threshold
VDDx Hysteresis
Symbol Min
Typ Max Unit
Test Conditions/Comments
PW 6.6
150
tPHL, tPLH
4.8
6.8 14
PWD
0.7 3
1.5
tPSK 7.0
ns
Mbps
ns
ns
ps/°C
ns
Within PWD limit
Within PWD limit
50% input to 50% output
|tPLH − tPHL|
Between any two units at the same
temperature, voltage, and load
tPSKCD
tPSKOD
0.7 3.0
0.7 3.0
290
45
ns
ns
ps p-p
ps rms
See the Jitter Measurement section
See the Jitter Measurement section
VIH
VIL
VOH
VOL
II
IDD1 (Q)
IDD2 (Q)
IDD1 (Q)
IDD2 (Q)
IDD1 (Q)
IDD2 (Q)
IDD1 (Q)
IDD2 (Q)
IDDI (D)
IDDO (D)
UVLO
VDDxUV+
VDDxUV−
VDDxUVH
0.7 × VDDx
0.3 × VDDx
V
V
VDDx − 0.1
VDDx − 0.4
−10
VDDx
VDDx − 0.2
0.0
0.2
+0.01
0.1
0.4
+10
V
V
V
V
µA
IOx1 = −20 µA, VIx = VIxH2
IOx1 = −2 mA, VIx = VIxH2
IOx1 = 20 µA, VIx = VIxL3
IOx1 = 2 mA, VIx = VIxL3
0 V ≤ VIx ≤ VDDx
0.8 1.3 mA VI4 = 0 (N0), 1 (N1)5
1.2 1.8 mA VI4 = 0 (N0), 1 (N1)5
6.3 9.7 mA VI4 = 1 (N0), 0 (N1)5
1.3 1.8 mA VI4 = 1 (N0), 0 (N1)5
1.0 1.6 mA VI4 = 0 (N0), 1 (N1)5
1.0 1.5 mA VI4 = 01 (N0), 1 (N1)5
3.9 5.8 mA VI4 = 1 (N0), 0 (N1)5
4.8 6.4 mA VI4 = 1 (N0), 0 (N1)5
0.01 mA/Mbps Inputs switching, 50% duty cycle
0.01 mA/Mbps Inputs switching, 50% duty cycle
1.6 V
1.5 V
0.1 V
Rev. B | Page 5 of 19

5 Page





ADuM120N arduino
Data Sheet
ADuM120N/ADuM121N
REGULATORY INFORMATION
See Table 15 and the Insulation Lifetime section for details regarding recommended maximum working voltages for specific cross-
isolation waveforms and insulation levels.
Table 11.
Regulatory Body
UL (PENDING)
Insulation
Parameter
Single protection
CSA (PENDING)
CSA 60950-1-07+A1+A2
and IEC 60950-1,
Second Edition,
+A1+A2
IEC 60601-1 Edition 3.1
CSA 61010-1-12 and IEC
61010-1 Third Edition
VDE (PENDING)
CQC (PENDING)
GB4943.1-2011
Basic insulation
Reinforced
insulation
Basic insulation
(1 MOPP)
Basic insulation
Reinforced
insulation
Basic insulation
Reinforced
insulation
Basic insulation
Reinforced
insulation
Insulation Specifications
3000 V rms isolation voltage
400 V rms (565 V peak)
Recognition/Approval Program
Recognized under UL 1577
Component Recognition Program1
Approved under CSA Component
Acceptance Notice
File
File E214100
File 205078
200 V rms (283 V peak)
250 V rms (354 V peak)
300 V rms mains, 400 V rms
(565 V peak)
300 V r ms mains, 200 V
secondary (283 V peak)
565 V peak, VIOSM = 10,000 V peak
565 V peak, VIOSM = 6000 V peak
DIN V VDE V 0884-10 (VDE V
0884-10):2006-1222
400 V rms (565 V peak) working
voltage
200 V rms (283 v peak)
Certified under
CQC11-471543-2012
File 2471900-
4880-0001
File (pending)
1 In accordance with UL 1577, each ADuM120N/ADuM121N is proof tested by applying an insulation test voltage ≥ 3600 V rms for 1 sec.
2 In accordance with DIN V VDE V 0884-10, each ADuM120N/ADuM121N is proof tested by applying an insulation test voltage ≥ 1059 V peak for 1 sec (partial discharge
detection limit = 5 pC). The * marking branded on the component designates DIN V VDE V 0884-10 approval.
Rev. B | Page 11 of 19

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