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PDF ADAS1256 Data sheet ( Hoja de datos )
| Número de pieza | ADAS1256 | |
| Descripción | Charge-to-Digital AFE on Flex | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Data Sheet
256-Channel, 16-Bit,
Charge-to-Digital AFE on Flex
ADAS1256
FEATURES
GENERAL DESCRIPTION
256-channel, charge-to-digital conversion on a single chip
16-bit resolution with no missing codes
Simultaneous sampling
User adjustable full-scale range up to 32 pC
Down to 22 µs line time
The ADAS1256 is a 256-channel, 16-bit, digital X-ray analog
front end (AFE) that integrates the complete charge-to-digital
conversion signal chain on a single chip. It enables a wide range
of digital X-ray modalities, including portable radiology and
mammography as well as high speed fluoroscopy and cardiac
Ultralow noise: 560 e− at 2 pC range
INL ± 2.5 LSB or 57.5 ppm, ADC included
Multiple functional power modes: 1 mW/channel to
3 mW/channel
Multiple power-down and sleep modes:
down to 0.005 mW/channel
Measurement of electron or hole collected charge
Tested and delivered on high density system on flex (SOF)
LVDS/CMOS self-clocked serial interface
SPI daisy-chain configuration registers
imaging. The ADAS1256 is delivered on a high density system-
on-flex (SOF) package that can be directly mounted on a digital
X-ray panel.
All converted channel results are output on a single LVDS
self-clocked serial interface that significantly reduces external
hardware.
An SPI-compatible serial interface allows configuration of the
AFE, using the SDI input. The SDO output allows the user to
daisy-chain several AFEs on a single 3-wire bus.
On-board AFE timing sequencer
On-board temperature sensor and reference buffer
An integrated AFE timing sequencer controls the sampling activity
of the analog front end (AFE). The sequencer is programmed via
APPLICATIONS
the SPI port and is timed by a single clock, ACLK.
Digital X-ray panel
Photodiode sensors array
CT scanner
High channel count, data acquisition systems (current or
voltage input)
FUNCTIONAL BLOCK DIAGRAM
AVDDI
AVDD5F
AVDD5B AVDD DVDD5
DVDD
TO NEXT SDI
TO ALL AFEs
SDO
IN0
IN127
IN128
IN255
IFS
CDS
IFS
CDS
IFS
CDS
IFS
CDS
ADC
CONFIGURATION
SDI
DATA
PROCESSING
LVDS/CMOS
INTERFACE
ADC
SOF
TO ADCs AND DAC
SCK
CS
RESET
DOUTA/DOUTB
DCLK
ACLK
SYNC
IOVDD
IOGND
SDI
FPGA
VIO
–VBIAS
TFT PANEL
REF_TFT
AVSSI
VT REF_ADC 4.096V
SYSTEM
MOTHERBOARD
FROM PREVIOUS
SDO
FROM DOUT
OF OTHER AFEs
Figure 1.
Rev. Sp0
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2012 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
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