CAT24C21RITE13 Datasheet PDF - Catalyst Semiconductor
| Part Number | CAT24C21RITE13 | |
| Description | 1-kb Dual Mode Serial EEPROM for VESA Plug-and-Play | |
| Manufacturers | Catalyst Semiconductor | |
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There is a preview and CAT24C21RITE13 download ( pdf file ) link at the bottom of this page. Total 12 Pages | ||
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CAT24C21
1-kb Dual Mode Serial EEPROM for VESA™ "Plug-and-Play"
FEATURES
ALOGEN FR
LEA D F REETM
s DDC1TM/DDC2TM interface compliant for
monitor identification
s 400 kHz I2C bus compatible*
s 2.5 to 5.5 volt operation
s 16-byte page write buffer
s Hardware write protect
s Low power CMOS technology
s 1,000,000 program/erase cycles
s 100 year data retention
s 8-pin DIP, SOIC, TSSOP, MSOP or TDFN
packages
s Industrial temperature range
DESCRIPTION
The CAT24C21 is a 1-kb Serial CMOS EEPROM
internally organized as 128 words of 8 bits each. The
device complies with the Video Electronics Standard
Association's (VESA™), Display Data Channel (DDC™)
standards for "Plug-and-Play" monitors. The "transmit-
only" mode (DDC1™) is controlled by the VCLK clock
input and the "bi-directional" mode (DDC2™) is controlled
by the SCL clock input, with both modes sharing a
common SDA input/output (I/O). The transmit-only mode
is a read-only mode, while the bi-directional mode is a
read and write mode following the I2C protocol. In write
mode the CAT24C21 features a 16-byte page write
buffer. The device is available in 8-in DIP, SOIC, TSSOP,
MSOP and TDFN packages.
PIN CONFIGURATION
DIP Package (P, L)
SOIC Package (J, W)
NC
NC
NC
VSS
1
2
3
4
8 VCC
7 VCLK
6 SCL
5 SDA
NC
NC
NC
VSS
1
2
3
4
8 VCC
7 VCLK
6 SCL
5 SDA
MSOP Package (R, Z)
TDFN Package (RD4, ZD4)
NC
NC
NC
VSS
1
2
3
4
8 VCC
7 VCLK
6 SCL
5 SDA
TSSOP Package (U, Y)
NC 1
NC 2
NC 3
VSS 4
8 VCC
7 VCLK
6 SCL
5 SDA
3 mm x 3 mm
Top View
NC
NC
NC
VSS
1
2
3
4
8 VCC
7 VCLK
6 SCL
5 SDA
* Catalyst Semiconductor is licensed by Philips Corporation to carry the I2C Bus
Protocol.
FUNCTIONAL SYMBOL
VCC
SCL
VCLK
CAT24C21
SDA
VSS
PIN FUNCTIONS
Pin Name
Function
NC No Connect
SDA
Serial Data/Address
SCL Serial Clock (bi-directional mode)
VCLK
Serial Clock (transmit-only mode)
VCC Power Supply
VSS Ground
© 2004 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
1
Doc. No. 1032, Rev. O
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CAT24C21
BI-DIRECTIONAL MODE (DDC2)
The following defines the features of the I2C bus protocol
in bi-directional mode (Figure 4):
(1) Data transfer may be initiated only when the bus is
not busy.
(2) During a data transfer, the data line must remain
stable whenever the clock line is high. Any changes
in the data line while the clock line is high will be
interpreted as a START or STOP condition.
When in the bi-directional mode, all inputs to the VCLK
pin are ignored, except when a logic high is required to
enable write capability.
START Condition
The START condition (Figure 6) precedes all commands
to the device, and is defined as a HIGH to LOW transition
of SDA when SCL is HIGH. The CAT24C21 monitors the
SDA and SCL lines and will not respond until this
condition is met.
STOP Condition
A LOW to HIGH transition of SDA when SCL is HIGH
determines the STOP condition. All operations must end
with a STOP condition.
Device Addressing
The bus Master begins a transmission by sending a
START condition. The Master then sends the address
of the particular slave device it is requesting. The four
most significant bits of the 8-bit slave address are fixed
as 1010 for the CAT24C21 (see Fig. 8). The next three
significant bits are "don't care". The last bit of the slave
address specifies whether a Read or Write operation is
to be performed. When this bit is set to 1, a Read
operation is selected, and when set to 0, a Write operation
is selected.
After the Master sends a START condition and the slave
address byte, the CAT24C21 monitors the bus and
responds with an acknowledge (on the SDA line) when
its address matches the transmitted slave address. The
CAT24C21 then performs a Read or Write operation
depending on the state of the R/W bit.
Figure 3. Transmit-only Mode
SCL must remain high for transmit-only mode
SCL
SDA
VCLK
Bit8
(MSB)
Bit7
Bit6
Bit5
Bit4 Bit3
Bit2
Bit1
(LSB)
Don't
Care
Bit8
Bit7
TVHIGH
TVLOW
5 Doc. No. 1032, Rev. O
Preview 5 Page |
Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for CAT24C21RITE13 electronic component. |
| Information | Total 12 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ CAT24C21RITE13.PDF Datasheet ] | |
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| CAT24C21RITE13 | The function is 1-kb Dual Mode Serial EEPROM for VESA Plug-and-Play. Catalyst Semiconductor | |
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