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PDF ADF5901 Data sheet ( Hoja de datos )
| Número de pieza | ADF5901 | |
| Descripción | 24 GHz VCO and PGA | |
| Fabricantes | Analog Devices | |
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Data Sheet
24 GHz VCO and PGA
with 2-Channel PA Output
ADF5901
FEATURES
24 GHz to 24.25 GHz voltage controlled oscillator (VCO)
2-channel 24 GHz power amplifier (PA) with 8 dBm output
Single-ended outputs
2-channel muxed outputs with mute function
Programmable output power
N divider output (frequency discriminator)
24 GHz local oscillator (LO) output buffer
250 MHz signal bandwidth
Power control detector
Auxiliary 8-bit ADC
±5°C temperature sensor
4-wire serial peripheral interface (SPI)
Electrostatic discharge (ESD) performance
Human body model (HBM): 2000 V
Charged device model (CDM): 250 V
Qualified for automotive applications
APPLICATIONS
Industrial sensors
Precision instrumentation
Tank level sensors
Smart sensors
Door opening
Energy saving
Commercial sensors: object detection and tracking
Cars, boats, aircraft, and UAVs (drones): collision avoidance
Intelligent transportation systems: intelligent traffic
monitoring and control
Surveillance and security
GENERAL DESCRIPTION
The ADF5901 is a 24 GHz Tx monolithic microwave integrated
circuit (MMIC) with an on-chip, 24 GHz VCO with PGA and
dual Tx channels for radar systems. The on-chip, 24 GHz VCO
generates the 24 GHz signal for the two Tx channels and the LO
output. Each Tx channel contains a power control circuit. There
is also an on-chip temperature sensor.
Automotive radars
Industrial radars
Microwave radar sensors
Control of all the on-chip registers is through a simple 4-wire
interface.
The ADF5901 comes in a compact 32-lead, 5 mm × 5 mm
LFCSP package.
FUNCTIONAL BLOCK DIAGRAM
VREG
C1 C2
TX_AHI RF_AHI AHI
DVDD VCO_AHI
RSET
REFIN
MUXOUT
REGULATOR
R-DIVIDER
VCO
CAL
ADF5901
REFERENCE
ADC
TXOUT1
CLK
DATA
LE
DOUT
CE
N-DIVIDER
32-BIT
DATA
REGISTER
÷2
ADC
÷2
TEMPERATURE
SENSOR
ADC
VTUNE
AUX
AUX
Figure 1.
LOOUT
GND
TXOUT2
ATEST
Rev. A
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responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2015–2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
ADF5901
Data Sheet
Parameter
ADC
Resolution
Integral Nonlinearity (INL)
Differential Nonlinearity (DNL)
Least Significant Bit (LSB)
REFIN CHARACTERISITICS
REFIN Input Frequency
REFIN Input Capacitance
REFIN Input Current
LOGIC INPUTS
Input Voltage
High (VIH)
Low (VIL)
Input Current (IINH, IINL)
Input Capacitance (CIN)
LOGIC OUTPUTS
Output Voltage
High (VOH)2
Low (VOL)
Output Current
High (IOH)
Low (IOL)
Min Typ Max Unit
8 Bits
±1 LSB
±1 LSB
7.4 mV
10 260 MHz
1.2
±100
pF
µA
Test Conditions/Comments
−5 dBm minimum to +9 dBm maximum biased
at AHI/2 (ac coupling ensures 1.8/2 bias); for
frequencies < 10 MHz, use a dc-coupled, CMOS-
compatible square wave with a slew rate >
25 V/µs
1.4 V
0.6 V
±1 µA
10 pF
VDD −
0.4
V
0.4 V
500 µA
500 µA
1 TA = 25°C; AHI = 3.3 V; fREFIN = 100 MHz; RF = 24.125 GHz following initialization sequence in the Initialization Sequence section.
2 VDD selected from IO level bit (DB11 in Register 3).
TIMING SPECIFICATIONS
AHI = TX_AHI = RF_AHI = VCO_AHI = DVDD = 3.3 V ± 5%, AGND = 0 V, dBm referred to 50 Ω, TA = TMIN to TMAX, unless otherwise
noted. Operating temperature range is −40°C to +105°C.
Table 2. Write Timing
Parameter
Limit at TMIN to TMAX
t1 20
t2 10
t3 10
t4 25
t5 25
t6 10
t7 20
t8 10
t9 15
Unit
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns max
ns max
Description
LE setup time
DATA to CLK setup time
DATA to CLK hold time
CLK high duration
CLK low duration
CLK to LE setup time
LE pulse width
LE setup time to DOUT
CLK setup time to DOUT
Rev. A | Page 4 of 26
5 Page 
ADF5901
3.5
3.0
2.5
2.0
1.5
–40°C
1.0
+25°C
+105°C
OUTSIDE OF SPECIFIED RANGE
0.5
0
23.75
23.88
24.10 24.13 24.25
OUTPUT FREQUENCY (GHz)
24.38
Figure 11. VTUNE Frequency Range
24.50
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
–140
–150
1k
10k 100k 1M
FREQUENCY OFFSET (Hz)
10M
Figure 12. Open-Loop Phase Noise on Tx1 Output at 24.125 GHz
Data Sheet
250
1.8
1.6
200
1.4
1.2
150
1.0
0.8 100
0.6
0.4 50
0.2
00
TEMPERATURE (ºC)
Figure 13. ATEST Voltage and ADC Code vs. Temperature
Rev. A | Page 10 of 26
11 Page | ||
| Páginas | Total 27 Páginas | |
| PDF Descargar | [ Datasheet ADF5901.PDF ] | |
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