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Analog Devices - 12-/10-/8-Bit ADC

Numéro de référence AD7478A
Description 12-/10-/8-Bit ADC
Fabricant Analog Devices 
Logo Analog Devices 





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AD7478A fiche technique
Data Sheet
2.35 V to 5.25 V, 1 MSPS,
12-/10-/8-Bit ADCs in 6-Lead SC70
AD7476A/AD7477A/AD7478A
FEATURES
Fast throughput rate: 1 MSPS
Specified for VDD of 2.35 V to 5.25 V
Low power
3.6 mW at 1 MSPS with 3 V supplies
12.5 mW at 1 MSPS with 5 V supplies
Wide input bandwidth
71 dB SNR at 100 kHz input frequency
Flexible power/serial clock speed management
No pipeline delays
High speed serial interface
SPI/QSPI™/MICROWIRE/DSP compatible
Standby mode: 1 µA maximum
6-lead SC70 package
8-lead MSOP
Qualified for automotive applications
FUNCTIONAL BLOCK DIAGRAM
VDD
VIN T/H
12-/10-/8-BIT
SUCCESSIVE-
APPROXIMATION
ADC
CONTROL
LOGIC
AD7476A/AD7477A/AD7478A
GND
Figure 1.
SCLK
SDATA
CS
APPLICATIONS
Battery-powered systems
Personal digital assistants
Medical instruments
Mobile communications
Instrumentation and control systems
Data acquisition systems
High speed modems
Optical sensors
GENERAL DESCRIPTION
The AD7476A/AD7477A/AD7478A are 12-bit, 10-bit, and 8-bit
high speed, low power, successive-approximation analog-to-
digital converters (ADCs), respectively. The parts operate from
a single 2.35 V to 5.25 V power supply and feature throughput
rates up to 1 MSPS. The parts contain a low noise, wide
bandwidth track-and-hold amplifier that can handle input
frequencies in excess of 13 MHz. The conversion process and
data acquisition are controlled using CS and the serial clock,
allowing the devices to interface with microprocessors or DSPs.
The input signal is sampled on the falling edge of CS, and the
conversion is also initiated at this point. There are no pipeline
delays associated with the parts. The AD7476A/AD7477A/
AD7478A use advanced design techniques to achieve low power
dissipation at high throughput rates. The reference for the part
is taken internally from VDD to allow the widest dynamic input
range to the ADC. Thus, the analog input range for the part is
0 V to VDD. The conversion rate is determined by the SCLK.
PRODUCT HIGHLIGHTS
1. First 12-/10-/8-bit ADCs in a SC70 package.
2. High throughput with low power consumption.
3. Flexible power/serial clock speed management. The
conversion rate is determined by the serial clock, allowing
the conversion time to be reduced through the serial clock
speed increase. This allows the average power consumption
to be reduced when a power-down mode is used while not
converting. The parts also feature a power-down mode to
maximize power efficiency at lower throughput rates.
Current consumption is 1 µA maximum and 50 nA
typically when in power-down mode.
4. Reference derived from the power supply.
5. No pipeline delay. The parts feature a standard successive
approximation ADC with accurate control of the sampling
instant via a CS input and once-off conversion control.
Rev. G
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2002–2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com

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