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PDF AD7623 Data sheet ( Hoja de datos )
| Número de pieza | AD7623 | |
| Descripción | 1.33 MSPS PulSAR ADC | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de AD7623 (archivo pdf) en la parte inferior de esta página. Total 29 Páginas | ||
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FEATURES
Throughput: 1.33 MSPS
2.048 V internal reference
Differential input range: ±VREF (VREF up to 2.5 V)
INL: ±1 LSB typical
16-bit resolution with no missing codes
SINAD: 88 dB typical @ 100 kHz
THD: −97 dB typical @ 100 kHz
No pipeline delay (SAR architecture)
Parallel (16- or 8-bit bus) and serial 5 V/3.3 V/2.5 V interface
SPI®-/QSPI™-/MICROWIRE™-/DSP-compatible
2.5 V single-supply operation
Power dissipation: 45 mW typical @ 1.33 MSPS
48-lead LQFP and LFCSP_VQ packages
Speed upgrade of the AD7677
APPLICATIONS
Medical instruments
High speed data acquisition
Digital signal processing
Communications
Instrumentation
Spectrum analysis
ATE
GENERAL DESCRIPTION
The AD7623 is a 16-bit, 1.33 MSPS, charge redistribution SAR,
fully differential analog-to-digital converter (ADC) that
operates from a single 2.5 V power supply. It contains a high
speed 16-bit sampling ADC, an internal conversion clock, an
internal reference (and buffer), error correction circuits, and
both serial and parallel system interface ports. Power consump-
tion is automatically scaled with throughput, making it ideal
for battery-powered applications. It is available in 48-lead, low
profile quad flat package (LQFP) and a lead frame chip-scale
(LFCSP_VQ) package. Operation is specified from
−40°C to +85°C.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
16-Bit, 1.33 MSPS PulSAR® ADC
AD7623
FUNCTIONAL BLOCK DIAGRAM
TEMP REFBUFIN REF REFGND
DVDD DGND
AGND
AVDD
IN+
IN–
PDREF
PDBUF
PD
RESET
REF
REF AMP
SWITCHED
CAP DAC
AD7623
SERIAL
PORT
16
PARALLEL
INTERFACE
CLOCK
CONTROL LOGIC AND
CALIBRATION CIRCUITRY
OVDD
OGND
D[15:0]
SER/PAR
BUSY
RD
CS
OB/2C
BYTESWAP
CNVST
Figure 1.
Table 1. PulSAR Selection
Type/kSPS
Pseudo
Differential
True Bipolar
True
Differential
18-Bit
Multichannel/
Simultaneous
100 to 250
AD7651
AD7660/61
AD7663
AD7675
500 to 570
AD7650/52
AD7664/66
AD7665
AD7676
AD7678
AD7679
AD7654
800 to
1000
AD7653
AD7667
AD7671
AD7677
AD7674
AD7655
>1000
AD7621
AD7623
AD7641
PRODUCT HIGHLIGHTS
1. Fast Throughput.
The AD7623 is a 1.33 MSPS, charge redistribution,
16-bit SAR ADC.
2. Superior Linearity.
The AD7623 has no missing 16-bit code.
3. Internal Reference.
The AD7623 has a 2.048 V internal reference with a
typical drift of ±7 ppm/°C.
4. Single-Supply Operation.
The AD7623 operates from a 2.5 V single supply and
typically dissipates 45 mW. Its power dissipation decreases
with the throughput.
5. Serial or Parallel Interface.
Versatile parallel (16- or 8-bit bus) or 2-wire serial interface
arrangement compatible with 2.5 V, 3.3 V, or 5 V logic.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved.
1 page  
AD7623
Parameter
EXTERNAL REFERENCE
Voltage Range
Current Drain
REFERENCE BUFFER
REFBUFIN Input Voltage Range
TEMPERATURE PIN
Voltage Output
Temperature Sensitivity
Output Resistance
DIGITAL INPUTS
Logic Levels
VIL
VIH
IIL
IIH
DIGITAL OUTPUTS
Data Format7
Pipeline Delay8
VOL
VOH
POWER SUPPLIES
Specified Performance
AVDD
DVDD
OVDD
Operating Current10
AVDD11
DVDD
OVDD
Power Dissipation10
With Internal Reference11
Without Internal Reference11
In Power-Down Mode12
TEMPERATURE RANGE13
Specified Performance
Conditions
PDREF = PDBUF = high
REF
1.33 MSPS throughput
PDREF = high, PDBUF = low
@ 25°C
Min
1.8
1.05
–0.3
1.7
–1
–1
Typ
2.048
100
1.2
273
0.85
4.7
Max
AVDD
1.30
+0.6
5.25
+1
+1
ISINK = 500 μA
ISOURCE = –500 μA
1.33 MSPS throughput
With internal reference
1.33 MSPS throughput
1.33 MSPS throughput
PD = high
TMIN to TMAX
OVDD − 0.3
0.4
2.37
2.37
2.309
–40
2.5 2.63
2.5 2.63
3.6
15
1.6
0.6
50 55
45 53
600
+85
1 When using an external reference. With the internal reference, the input range is from −0.1 V to VREF.
2 See the Analog Inputs section.
3 Linearity is tested using endpoints, not best fit. Tested with an external reference at 2.048 V.
4 LSB means least significant bit. With the ±2.048 V input range, 1 LSB is 62.5 μV.
5 See the Terminology section. These specifications do not include the error contribution from the external reference.
6 All specifications in dB are referred to a full-scale input FSR. Tested with an input signal at 0.5 dB below full-scale, unless otherwise specified.
7 Parallel or serial 16-bit.
8 Conversion results are available immediately after completed conversion.
9 See the Absolute Maximum Ratings section.
10 Tested in parallel reading mode.
11 With internal reference, PDREF and PDBUF are low; without internal reference, PDREF and PDBUF are high.
12 With all digital inputs forced to OVDD.
13 Consult sales for extended temperature range.
Unit
V
μA
V
mV
mV/°C
kΩ
V
V
μA
μA
V
V
V
V
V
mA
mA
mA
mW
mW
μW
°C
Rev. 0 | Page 4 of 28
5 Page 
AD7623
Pin No.
35
36
37
38
39
43
45
46
47
48
Mnemonic
CNVST
AGND
REF
REFGND
IN−
IN+
TEMP
REFBUFIN
PDREF
PDBUF
Type 1
DI
P
AI/O
AI
AI
AI
AO
AI/O
DI
DI
Description
Conversion Start. A falling edge on CNVST puts the internal sample-and-hold into the hold state and
initiates a conversion.
Analog Power Ground Pin.
Reference Output/Input.
When PDREF/PDBUF = low, the internal reference and buffer are enabled, producing 2.048 V on this pin.
When PDREF/PDBUF = high, the internal reference and buffer are disabled, allowing an externally
supplied voltage reference up to AVDD volts. Decoupling is required with or without the internal
reference and buffer. Refer to the Voltage Reference Input section.
Reference Input Analog Ground.
Differential Negative Analog Input.
Differential Positive Analog Input.
Temperature Sensor Analog Output.
Internal Reference Output/Reference Buffer Input.
When PDREF/PDBUF = low, the internal reference and buffer are enabled, producing the 1.2 V (typical)
band gap output on this pin, which needs external decoupling. The internal fixed gain reference buffer
uses this to produce 2.048V on the REF pin.
When using an external reference with the internal reference buffer (PDBUF = low, PDREF = high),
applying 1.2 V on this pin produces 2.048 V on the REF pin. Refer to the Voltage Reference Input section.
Internal Reference Power-Down Input.
When low, the internal reference is enabled.
When high, the internal reference is powered down, and an external reference must be used.
Internal Reference Buffer Power-Down Input.
When low, the buffer is enabled (must be low when using internal reference).
When high, the buffer is powered-down.
1 AI = analog input; AI/O = bidirectional analog; AO = analog output; DI = digital input; DI/O = bidirectional digital; DO = digital output; P = power.
Rev. 0 | Page 10 of 28
11 Page | ||
| Páginas | Total 29 Páginas | |
| PDF Descargar | [ Datasheet AD7623.PDF ] | |
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