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PDF ADE7880 Data sheet ( Hoja de datos )
| Número de pieza | ADE7880 | |
| Descripción | Polyphase Multifunction Energy Metering IC | |
| Fabricantes | Analog Devices | |
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Data Sheet
Polyphase Multifunction Energy Metering IC
with Harmonic Monitoring
ADE7880
FEATURES
Highly accurate; supports IEC 62053-21, IEC 62053-22,
IEC 62053-23, EN 50470-1, EN 50470-3, ANSI C12.20, and
IEEE1459 standards
Supports IEC 61000-4-7 Class I and Class II accuracy
specification
Compatible with 3-phase, 3-wire or 4-wire (delta or wye),
and other 3-phase services
Supplies rms, active, reactive, and apparent powers, power
factor, THD, and harmonic distortion of all harmonics
within 2.8 kHz pass band on all phases
Supplies rms and harmonic distortions of all harmonics
within 2.8 kHz pass band on neutral current
Less than 1% error in harmonic current and voltage rms,
harmonic active and reactive powers over a dynamic
range of 2000 to 1 at TA = 25°C
Supplies total (fundamental and harmonic) active and
apparent energy and fundamental active/reactive energy
on each phase and on the overall system
Less than 0.1% error in active and fundamental reactive
energy over a dynamic range of 1000 to 1 at TA = 25°C
Less than 0.2% error in active and fundamental reactive
energy over a dynamic range of 5000 to 1 at TA = 25°C
Less than 0.1% error in voltage and current rms over a
dynamic range of 1000 to 1 at TA = 25°C
Battery supply input for missing neutral operation
Wide supply voltage operation: 2.4 V to 3.7 V
Reference: 1.2 V (drift 20 ppm/°C typical) with external
overdrive capability
40-lead lead frame chip scale package (LFCSP), Pb-free, pin-
for-pin compatible with ADE7854, ADE7858, ADE7868 and
ADE7878
APPLICATIONS
Energy metering systems
Power quality monitoring
Solar inverters
Process monitoring
Protective devices
GENERAL DESCRIPTION
The ADE78801 is a high accuracy, 3-phase electrical energy
measurement IC with serial interfaces and three flexible pulse
outputs. The ADE7880 device incorporates second-order sigma-
delta (Σ-Δ) analog-to-digital converters (ADCs), a digital
integrator, reference circuitry, and all of the signal processing
required to perform the total (fundamental and harmonic) active,
and apparent energy measurements, rms calculations, as well as
fundamental-only active and reactive energy measurements. In
addition, the ADE7880 computes the rms of harmonics on the
phase and neutral currents and on the phase voltages, together
with the active, reactive and apparent powers, and the power
factor and harmonic distortion on each harmonic for all phases.
Total harmonic distortion (THD) is computed for all currents
and voltages. A fixed function digital signal processor (DSP)
executes this signal processing. The DSP program is stored in
the internal ROM memory.
The ADE7880 is suitable for measuring active, reactive, and
apparent energy in various 3-phase configurations, such as wye
or delta services with, both, three and four wires. The ADE7880
provides system calibration features for each phase, that is, rms
offset correction, phase calibration, and gain calibration. The
CF1, CF2, and CF3 logic outputs provide a wide choice of
power information: total active powers, apparent powers, or the
sum of the current rms values, and fundamental active and
reactive powers.
The ADE7880 contains waveform sample registers that allow
access to all ADC outputs. The devices also incorporate power
quality measurements, such as short duration low or high
voltage detections, short duration high current variations, line
voltage period measurement, and angles between phase voltages
and currents. Two serial interfaces, SPI and I2C, can be used to
communicate with the ADE7880. A dedicated high speed
interface, the high speed data capture (HSDC) port, can be used
in conjunction with I2C to provide access to the ADC outputs
and real-time power information. The ADE7880 also has two
interrupt request pins, IRQ0 and IRQ1, to indicate that an enabled
interrupt event has occurred. Three specially designed low power
modes ensure the continuity of energy accumulation when the
ADE7880 is in a tampering situation. The ADE7880 is available
in the 40-lead LFCSP, Pb-free package, pin-for-pin compatible
with ADE7854, ADE7858, ADE7868, and ADE7878 devices.
1 Protected by U.S. Patent 8,010,304 B2. Other patents pending.
Rev. C
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2011–2014 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
ADE7880
Data Sheet
FUNCTIONAL BLOCK DIAGRAM
RESET
4
REFIN/OUT VDD
17 26
AGND
25
AVDD
24
DVDD DGND
56
CLKIN 27
CLKOUT 28
IAP 7
PGA1
IAN 8
VAP 23
IBP 9
IBN 12
PGA1
VBP 22
ICP 13
ICN 14
PGA1
VCP 19
VN 18
INP 15
INN 16
PGA2
POR
LDO
LDO
1.2V
REF
HPFEN OF
DIGITAL
CONFIG3 INTEGRATOR AIGAIN
ADC
HPF
APHCAL
HPFEN OF
CONFIG3 AVGAIN
PGA3 ADC
HPF
ADC
PGA3 ADC
TOTAL/FUNDAMENTAL ACTIVE ENERGIES
FUNDAMENTAL REACTIVE ENERGY
APPARENT ENERGY
VOLTAGE CURRENT RMS
HARMONIC INFORMATION CALCULATION
FOR PHASE B
(SEE PHASE A FOR DETAILED DATA PATH)
ADC
PGA3 ADC
TOTAL/FUNDAMENTAL ACTIVE ENERGIES
FUNDAMENTAL REACTIVE ENERGY
APPARENT ENERGY
VOLTAGE/CURRENT RMS
HARMONIC INFORMATION CALCULATION
FOR PHASE C
(SEE PHASE A FOR DETAILED DATA PATH)
AIRMSOS
27
X2 LPF
AIRMS
APGAIN
X2 LPF
27
AVRMS
AVRMSOS
APGAIN
AWATTOS
LPF
COMPUTATIONAL
BLOCK FOR
FUNDAMENTAL
ACTIVE AND
REACTIVE POWER
APGAIN
AFWATTOS
PHASE A,
PHASE B,
AND
PHASE C
DATA
APGAIN
AFVAROS
COMPUTATIONAL
BLOCK FOR
HARMONIC
INFORMATION ON
PHASE A CURRENT
AND VOLTAGE
HPFEN OF
DIGITAL
CONFIG3 INTEGRATOR NIGAIN
COMPUTATIONAL BLOCK FOR HARMONIC
INFORMATION ON NEUTRAL CURRENT
NIRMSOS
ADC
HPF
X2
LPF
NIRMS
DIGITAL SIGNAL
PROCESSOR
ADE7880
2 PM0
3 PM1
CF1DEN
:DFC
33 CF1
CF2DEN
:DFC
34 CF2/HREADY
CF3DEN
:DFC
35 CF3/HSCLK
SPI/I2C
I2C
HSDC
29 IRQ0
32 IRQ1
36 SCLK/SCL
38 MOSI/SDA
37 MISO/HSD
39 SS/HSA
Figure 1. ADE7880 Functional Block Diagram
Rev. C | Page 4 of 107
5 Page 
ADE7880
Table 4. HSDC Interface Timing Parameter
Parameter
HSA to HSCLK Edge
HSCLK Period
HSCLK Low Pulse Width
HSCLK High Pulse Width
Data Output Valid After HSCLK Edge
Data Output Fall Time
Data Output Rise Time
HSCLK Rise Time
HSCLK Fall Time
HSD Disable After HSA Rising Edge
HSA High After HSCLK Edge
HSA
tSS
Symbol
tSS
tSL
tSH
tDAV
tDF
tDR
tSR
tSF
tDIS
tSFS
Min
0
125
50
50
5
0
tSFS
HSCLK
tDAV
HSD
tSL
tSH
tSF tSR
tDIS
MSB
INTERMEDIATE BITS
tDF
Figure 4. HSDC Interface Timing
LSB
tDR
2mA
IOL
TO OUTPUT
PIN CL
50pF
800µA
IOH
1.6V
Figure 5. Load Circuit for Timing Specifications
Data Sheet
Max Unit
ns
ns
ns
ns
40 ns
20 ns
20 ns
10 ns
10 ns
ns
ns
Rev. C | Page 10 of 107
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet ADE7880.PDF ] | |
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