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PDF HMC8121 Data sheet ( Hoja de datos )
| Número de pieza | HMC8121 | |
| Descripción | E-Band Variable Gain Amplifier | |
| Fabricantes | Analog Devices | |
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Data Sheet
FEATURES
Gain: 22 dB typical
Wide gain control range: 17 dB typical
Output third-order intercept (OIP3): 27.5 dBm typical
Output power for 1 dB compression (P1dB): 20 dBm typical
Saturated output power (PSAT): 21 dBm typical
DC supply: 4 V at 265 mA
No external matching required
Die size: 3.599 mm × 1.369 mm × 0.05 mm
APPLICATIONS
E-band communication systems
High capacity wireless backhaul radio systems
Test and measurement
81 GHz to 86 GHz,
E-Band Variable Gain Amplifier
HMC8121
GENERAL DESCRIPTION
The HMC8121 is an integrated E-band, gallium arsenide (GaAs),
pseudomorphic (pHEMT), monolithic microwave integrated
circuit (MMIC), variable gain amplifier and/or driver amplifier
that operates from 81 GHz to 86 GHz. The HMC8121 provides up
to 22 dB of gain, 20 dBm output P1dB, 27.5 dBm of OIP3, and
21 dBm of PSAT while requiring only 265 mA from a 4 V power
supply. Two gain control voltages (VCTL1 and VCTL2) are provided
to allow up to 17 dB of variable gain control. The HMC8121
exhibits excellent linearity and is optimized for E-band
communications and high capacity wireless backhaul radio
systems. All data is taken with the chip in a 50 Ω test fixture
connected via a 3 mil wide × 0.5 mil thick × 7 mil long ribbon
on each port.
1 23
1.6kΩ
FUNCTIONAL BLOCK DIAGRAM
HMC8121
1.6kΩ
4
5 RFOUT
6
28 27 26 25 24 23 22 21
20 19 18 17 16 15 14 13 12 11 10 9 8 7
Figure 1.
Rev. A
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
HMC8121
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
Drain Bias Voltage (VDD1 to VDD6)
Gate Bias Voltage (VGG1/VGG2, VGG3 to VGG6)
Gain Control Voltage (VCTL1 and VCTL2)
Maximum Junction Temperature (to Maintain
1 Million Hours Mean Time to Failure (MTTF))
Storage Temperature Range
Operating Temperature Range
Rating
4.5 V
−3 V to 0 V
−6 V to 0 V
175°C
−65°C to +150°C
−55°C to +85°C
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Data Sheet
THERMAL RESISTANCE
Table 3. Thermal Resistance
Package Type
28-Pad Bare Die [CHIP]
θJC1
69.5
Unit
°C/W
1 Based on ABLEBOND® 84-1LMIT as die attach epoxy with thermal
conductivity of 3.6 W/mK.
ESD CAUTION
Rev. A | Page 4 of 16
5 Page 
HMC8121
10
5
0
–5
–10
–15
–20
81.0
IIIIIIDDDDDDDDDDDD
=
=
=
=
=
=
265mA
250mA
225mA
200mA
175mA
150mA
IIIIIIDDDDDDDDDDDD
=
=
=
=
=
=
140mA
130mA
120mA
110mA
100mA
90mA
81.5 82.0 82.5 83.0 83.5 84.0
84.5
85.0
85.5
86.0
FREQUENCY (GHz)
Figure 29. Gain vs. Frequency at Various Drain Currents,
PIN = −5 dBm/Tone, VCTL1/VCTL2 = −1 V,
Drain Current = (IDD1/IDD2 fixed at 50 mA) + (IDD3 to IDD6 Swept)
24 350
20
POUT
16 GAIN
PAE
IDD
12
330
310
290
8 270
4 250
0
–15 –13 –11 –9 –7 –5 –3 –1
1
230
3
INPUT POWER (dBm)
Figure 30. POUT, Gain, PAE, and IDD vs. Input Power,
VCTL1/VCTL2 = −5 V, RF = 83.5 GHz
10
RF = 81GHz
RF = 83.5GHz
RF = 86GHz
1
0.1
0.01
0.001
–4 0 4 8 12 16 20
OUTPUT POWER (dBm)
Figure 31. Detector Output Voltage (VREF – VDET) vs. Output Power at
Various RF Frequencies, VCTL1/VCTL2 = −5 V
Data Sheet
24 350
20
POUT
16 GAIN
PAE
IDD
12
330
310
290
8 270
4 250
0
–15 –13 –11 –9 –7 –5 –3 –1
1
230
3
INPUT POWER (dBm)
Figure 32. POUT, Gain, PAE, and IDD vs. Input Power,
VCTL1/VCTL2 = −5 V, RF = 81 GHz
24 350
20
POUT
16 GAIN
PAE
IDD
12
330
310
290
8 270
4 250
0
–15 –13 –11 –9 –7 –5 –3 –1
1
230
3
INPUT POWER (dBm)
Figure 33. POUT, Gain, PAE, and IDD vs. Input Power,
VCTL1/VCTL2 = −5 V, RF = 86 GHz
0.40
100MHz TONE SPACING
300MHz TONE SPACING
0.35 500MHz TONE SPACING
750MHz TONE SPACING
0.30
0.25
0.20
0.15
0.10
0.05
0
–20 –18 –16 –14 –12 –10 –8 –6 –4
TOTAL INPUT POWER (dBm)
Figure 34. Envelope Detector Peak-to-Peak Output Voltage vs. Total Input
Power at Various Tone Spacings, RF = 81 GHz, VCTL1/VCTL2 = −5 V,
VDET = 4 V with 150 Ω Load Impedance at ENVDET
Rev. A | Page 10 of 16
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet HMC8121.PDF ] | |
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