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PDF CA5160 Data sheet ( Hoja de datos )
| Número de pieza | CA5160 | |
| Descripción | 4MHz/ BiMOS Microprocessor Operational Amplifiers with MOSFET Input/CMOS Output | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de CA5160 (archivo pdf) en la parte inferior de esta página. Total 19 Páginas | ||
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PO®SSOIBBLSECODSALaU3EtB1aT4SES0T,PhICTReUAeOTt3DE1U3P0CRTODUCT
May 2003
CA5160
FN1924.7
4MHz, BiMOS Microprocessor Operational
Amplifier with MOSFET Input/CMOS
Output
CA5160 is an integrated circuit operational amplifier that
combines the advantage of both CMOS and bipolar
transistors on a monolithic chip. The CA5160 is a frequency
compensated version of the popular CA5130 series. It is
designed and guaranteed to operate in microprocessor or
logic systems that use +5V supplies.
Gate-protected P-Channel MOSFET (PMOS) transistors are
used in the input circuit to provide very high input impedance,
very low input current, and exceptional speed performance.
The use of PMOS field effect transistors in the input stage
results in common-mode input voltage capability down to 0.5V
below the negative supply terminal, an important attribute in
single supply applications.
A complementary symmetry MOS (CMOS) transistor pair,
capable of swinging the output voltage to within 10mV of
either supply voltage terminal (at very high values of load
impedance), is employed as the output circuit.
The CA5160 operates at supply voltages ranging from +5V to
+16V, or ±2.5V to ±8V when using split supplies, and have
terminals for adjustment of offset voltage for applications
requiring offset-null capability. Terminal provisions are also
made to permit strobing of the output stage. It has guaranteed
specifications for 5V operation over the full military
temperature range of -55oC to 125oC.
Part Number Information
PART NUMBER
(BRAND)
CA5160M96 (5160)
TEMP.
RANGE (oC) PACKAGE
PKG.
NO.
-55 to 125 8 Ld SOIC
M8.15
Tape and Reel
Features
• MOSFET Input Stage
- Very High ZI; 1.5TΩ (1.5 x 1012Ω) (Typ)
- Very Low II; at 15V Operation. . . . . . . . . . . . . 5pA (Typ)
at 5V Operation . . . . . . . . . . . . . 2pA (Typ)
• Common-Mode Input Voltage Range Includes Negative
Supply Rail; Input Terminals Can be Swung 0.5V Below
Negative Supply Rail
• CMOS Output Stage Permits Signal Swing to Either (or
Both) Supply Rails
• CA5160 Has Full Military Temperature Range Guaranteed
Specifications for V+ = 5V
• CA5160 is Guaranteed to Operate Down to 4.5V for AOL
• CA5160 is Guaranteed Up to ±7.5V
Applications
• Ground Referenced Single Supply Amplifiers
• Fast Sample-Hold Amplifiers
• Long Duration Timers/Monostables
• Ideal Interface With Digital CMOS
• High Input Impedance Wideband Amplifiers
• Voltage Followers (e.g., Follower for Single Supply D/A
Converter)
• Wien-Bridge Oscillators
• Voltage Controlled Oscillators
• Photo Diode Sensor Amplifiers
• 5V Logic Systems
• Microprocessor Interface
Pinout
CA5160 (SOIC)
TOP VIEW
OFFSET NULL 1
INV. INPUT 2
NON INV. INPUT 3
V- 4
-
+
8 STROBE
7 V+
6 OUTPUT
5 OFFSET NULL
NOTE: CA5160 devices have an on-chip frequency compensation
network. Supplementary phase-compensation or frequency roll-off (if
desired) can be connected externally between terminals 1 and 8.
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
1 page  
CA5160
Schematic Diagram
BIAS CIRCUIT
CURRENT SOURCE
FOR Q6 AND Q7
Q1 Q2
Z1
8.3V
R1
40kΩ
D1
D2
D3
D4
Q4
R2
5kΩ
NON-INV.
INPUT
3+
2
-
INV. INPUT
INPUT STAGE
D5
D6 D7
Q6 Q7
R3
1kΩ
Q9
R4
1kΩ
Q10
“CURRENT SOURCE
LOAD” FOR Q11
Q3
Q5
7 V+
SECOND
STAGE
2kΩ
30
pF
Q11
OUTPUT
STAGE
Q8
OUTPUT
6
Q12
R5 R6
1kΩ 1kΩ
51
OFFSET NULL
SUPPLEMENTARY
COMP IF DESIRED
NOTE: Diodes D5 through D7 provide gate oxide protection for MOSFET Input Stage.
84
STROBING
Application Information
Circuit Description
Refer to the block diagram of the CA5160 CMOS
Operational Amplifier. The input terminals may be operated
down to 0.5V below the negative supply rail, and the output
can be swung very close to either supply rail in many
applications. Consequently, the CA5160 circuit is ideal for
single supply operation. Three class A amplifier stages,
having the individual gain capability and current
consumption shown in the block diagram, provide the total
gain of the CA5160. A biasing circuit provides two potentials
for common use in the first and second stages. Terminals 8
and 1 can be used to supplement the internal phase
compensation network if additional phase compensation or
frequency roll-off is desired. Terminals 8 and 4 can also be
used to strobe the output stage into a low quiescent current
state. When Terminal 8 is tied to the negative supply rail
(Terminal 4) by mechanical or electrical means, the output
potential at Terminal 6 essentially rises to the positive supply
rail potential at Terminal 7. This condition of essentially zero
current drain in the output stage under the strobed “OFF”
condition can only be achieved when the ohmic load
resistance presented to the amplifier is very high (e.g., when
the amplifier output is used to drive CMOS digital circuits in
comparator applications).
Input Stages
The circuit of the CA5160 is shown in the schematic diagram.
It consists of a differential input stage using PMOS field effect
transistors (Q6, Q7) working into a mirror pair of bipolar
transistors (Q9, Q10) functioning as load resistors together
with resistors R3 through R6. The mirror pair transistors also
function as a differential-to-single-ended converter to provide
base drive to the second-stage bipolar transistor (Q11). Offset
nulling, when desired, can be effected by connecting a
100,000Ω potentiometer across Terminals 1 and 5 and the
potentiometer slider arm to Terminal 4.
Cascode-connected PMOS transistors Q2, Q4, are the
constant current source for the input stage. The biasing
circuit for the constant current source is subsequently
described. The small diodes D5 through D7 provide gate-
oxide protection against high voltage transients, including
static electricity during handling for Q6 and Q7.
5
5 Page 
CA5160
+10.010V
10V LOGIC INPUTS
LSB
9
6
8
3
14
7
11
10
2
CD4007A
“SWITCHES”
654
6 3 10
CD4007A
“SWITCHES”
MSB
321
6 3 10
CD4007A
“SWITCHES”
9 13 1 12
13 1 12
13 1 12
78
5
4
806K
1%
402K
1%
200K
1%
85
100K
1%
806K
1%
806K
1%
8
(2)
806K
1%
5
(4)
806K
1%
(8)
806K
1%
806K
1%
VOLTAGE
+15V REGULATOR
62
21
CA3085
36
7
+ 2µF
- 25V
4
0.001µF
+10.010V
8
22.1K
1%
REGULATED
1K VOLTAGE
ADJUST
3.83K
1%
806K 750K
1% 1%
BIT
1
2
3
4
5
6-9
REQUIRED RATIO-
MATCH
Standard
±0.1%
±0.2%
±0.4%
±0.8%
±1% ABS.
PARALLELED
RESISTORS
OUTPUT
6
+15V
7
+
CA5160
LOAD
-
4
5
1
10K
3
VOLTAGE
FOLLOWER
2
100K
OFFSET
NULL
2K
0.1µF
FIGURE 8. 9 BIT DAC USING CMOS DIGITAL SWITCHES AND CA5160
INPUT 40V
+
2.4kΩ
1W
3
0.2µF
TURN
ON
DELAY
100kΩ
1.5kΩ
1W
100µF +
25V -
2.2kΩ
CA3086
10 11 2 1
+ 5µF
-
9
87
3
5 12 14
2N6385
POWER DARLINGTON
SHORT-CIRCUIT CURRENT
1Ω LIMIT ADJUSTMENT
2
10kΩ
OUTPUT
0V 35V
AT 1A
1kΩ
1
2kΩ
6
7
2N2102
1kΩ
1N914 56pF
8
10kΩ
+3
43kΩ
+
100µF
-
-
5
10kΩ
1
4
2
8.2
kΩ
64
13
4.7kΩ
1kΩ
50kΩ
100kΩ
62kΩ
0.01µF
-
Hum and Noise Output <250µVRMS; Regulation (No Load to Full Load) <0.005%; Input Regulation <0.01%/V
FIGURE 9. CA5160 VOLTAGE REGULATOR CIRCUIT (0.1 TO 35V AT 1A)
-
11
11 Page | ||
| Páginas | Total 19 Páginas | |
| PDF Descargar | [ Datasheet CA5160.PDF ] | |
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