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PDF NSTB60BDW1 Data sheet ( Hoja de datos )
| Número de pieza | NSTB60BDW1 | |
| Descripción | PNP General Purpose and NPN Bias Resistor Transistor Combination | |
| Fabricantes | ON Semiconductor | |
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NSTB60BDW1
PNP General Purpose and
NPN Bias Resistor
Transistor Combination
• Simplifies Circuit Design
• Reduces Board Space
• Reduces Component Count
• Available in 8 mm, 7 inch/3000 Unit Tape and Reel
• ESD Rating − Human Body Model: Class 1B
ESD Rating − Machine Model: Class B
• NSV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
MAXIMUM RATINGS
(TA = 25°C unless otherwise noted, common for Q1 and Q2)
Rating
Symbol Q1
Q2
Unit
Collector-Emitter Voltage
VCEO
− 50
50
Vdc
Collector-Base Voltage
VCBO
− 50
50
Vdc
Emitter−Base Voltage
VEBO −6.0 5.0
Vdc
Collector Current − Continuous
IC −150 150 mAdc
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
THERMAL CHARACTERISTICS
Characteristic
(One Junction Heated)
Symbol
Max
Unit
Total Device Dissipation
TA = 25°C
Derate above 25°C
PD 187 (Note 1) mW
256 (Note 2)
1.5 (Note 1) mW/°C
2.0 (Note 2)
Thermal Resistance −
Junction-to-Ambient
RθJA
670 (Note 1)
490 (Note 2)
°C/W
Characteristic
(Both Junctions Heated)
Symbol
Max
Unit
Total Device Dissipation
TA = 25°C
Derate above 25°C
PD 250 (Note 1) mW
385 (Note 2)
2.0 (Note 1) mW/°C
3.0 (Note 2)
Thermal Resistance −
Junction-to-Ambient
RθJA
493 (Note 1)
325 (Note 2)
°C/W
Thermal Resistance −
Junction-to-Lead
RθJL
188 (Note 1)
208 (Note 2)
°C/W
Junction and Storage Temperature
1. FR−4 @ Minimum Pad
2. FR−4 @ 1.0 x 1.0 inch Pad
TJ, Tstg
−55 to +150
°C
www.onsemi.com
(3) (2) (1)
Q2
R2 R1
(4) (5)
Q1
(6)
4
5
6
23
1
SOT−363
CASE 419B
STYLE 1
MARKING DIAGRAM
6
71 M G
G
1
71 = Device Code
M = Date Code*
G = Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
ORDERING INFORMATION
Device
Package Shipping†
NSTB60BDW1T1G SOT−363 3000 / Tape &
(Pb−Free)
Reel
NSVTB60BDW1T1G SOT−363 3000 / Tape &
(Pb−Free)
Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2015
March, 2015 − Rev. 4
1
Publication Order Number:
NSTB60BDW1T1/D
1 page  
NSTB60BDW1
PACKAGE DIMENSIONS
E
2X
bbb H D
e
6X ccc C
SOT−363/SC−88/SC70−6
CASE 419B−02
ISSUE Y
D
A
2X
aaa H D
D
6 54
E1
L2
1 23
aaa C
2X 3 TIPS
H
L
DETAIL A
GAGE
PLANE
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRU-
SIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END.
4. DIMENSIONS D AND E1 AT THE OUTERMOST EXTREMES OF
THE PLASTIC BODY AND DATUM H.
5. DATUMS A AND B ARE DETERMINED AT DATUM H.
6. DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THE
LEAD BETWEEN 0.08 AND 0.15 FROM THE TIP.
7. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION.
ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN
EXCESS OF DIMENSION b AT MAXIMUM MATERIAL CONDI-
TION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OF THE FOOT.
B
TOP VIEW
A1
SIDE VIEW
6X b
ddd M C A-B D
A2
A
DETAIL A
C
SEATING
PLANE
c
END VIEW
DIM
A
A1
A2
b
C
D
E
E1
e
L
L2
aaa
bbb
ccc
ddd
RECOMMENDED
SOLDERING FOOTPRINT*
6X
0.30
6X
0.66
MILLIMETERS
MIN NOM MAX
−−− −−− 1.10
0.00 −−− 0.10
0.70 0.90 1.00
0.15 0.20 0.25
0.08 0.15 0.22
1.80 2.00 2.20
2.00 2.10 2.20
1.15 1.25 1.35
0.65 BSC
0.26 0.36 0.46
0.15 BSC
0.15
0.30
0.10
0.10
INCHES
MIN NOM MAX
−−− −−− 0.043
0.000 −−− 0.004
0.027 0.035 0.039
0.006 0.008 0.010
0.003 0.006 0.009
0.070 0.078 0.086
0.078 0.082 0.086
0.045 0.049 0.053
0.026 BSC
0.010 0.014 0.018
0.006 BSC
0.006
0.012
0.004
0.004
STYLE 1:
PIN 1. EMITTER 2
2. BASE 2
3. COLLECTOR 1
4. EMITTER 1
5. BASE 1
6. COLLECTOR 2
2.50
0.65
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed
at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation
or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended,
or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which
the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or
unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable
copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
www.onsemi.com
5
NSTB60BDW1T1/D
5 Page | ||
| Páginas | Total 5 Páginas | |
| PDF Descargar | [ Datasheet NSTB60BDW1.PDF ] | |
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