UPD7201 Datasheet PDF - NEC
| Part Number | UPD7201 | |
| Description | MULTI-PROTOCOL SERIAL CONTROLLER | |
| Manufacturers | NEC | |
| Logo |  |
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There is a preview and UPD7201 download ( pdf file ) link at the bottom of this page. Total 12 Pages | ||
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NEe Microcomputers, Inc.
NEe
fLPD7201
DEseR IPTION
F EATU RES
PIN CONFIGURATION
MULTI-PROTOCOL SERIAL CONTROLLER
The "PD7201 is a dual-channel multi-function peripheral controller designed to satisfy a wide
variety of serial data communication requirements in microcomputer systems. Its basic function is
a serial-to-parallel, parallel-to..erial converter/controller and within that role it is configurable by
systems software so its ~'personality" can be optimized for a given serial data communications
application_
The "PD7201 is capable of handling asynchronous and synchronous byte-oriented protocols such
as IBM Bisync, and synchronous bit-oriented protocols such as HDLC and IBM SDLC_ This versa-
tile device can also be used to support virtually any other serial protocol for applications other
than data communications.
The "PD7201 can generate and check CRC codes in any synchronous mode and can be pro-
grammed to check data integrity in various modes. The device also has facilities for modem con-
trols in both channels. In applications where these controls are not needed, the modem controls
can be used for general-purpose 1/0_
• Two Fully Independent Duplex Serial Channels
• Four Independent DMA Channels for Send/Received Data fot Both Serial Inputs/Outputs
• Programmable Interrupt Vectors and Interrupt Priorities
• Modem Controls Signals
• Variable, Software Programmable Data Rate, Up to BaOK Baud at 3 MHz Clock
• Double Buffered Transmitter Data and Quadruply Buffered Received Data
• Programmable CRC Algorithm
• Selection of Interrupt, DMA or Polling Mode of Operation
• Asynchronous Operation:
Character Length: 5, 6, 7 or 8 Bits
Stop Bits: 1,1-1/2,2
Transmission Speed: xl, x16, x32 or x64 Clock Frequency
Parity: Odd, Even, or Disable
Break Generation and Detection
Interrupt on Parity, Overrun, or Framing Errors
• Monosync, Bisync, and External Sync Operations:
- Software Selectable Sync Characters
- Automatic Sync Insertion
- CRC Generation and Checking
• HDLC and SDLC Operations:
Abort Sequence Generation and Detection
Automatic Zero Insertion and Detection
- Address Field Recognition
- CRC Generation and Checking
- I-Field Residue Handling
• N-Channel MOS Technology
• Single +5V Power Supply; Interface to Most Microprocessors I.ncluding 8080, 8085, B086
and Others_
• Single Phase TTL Clock
• Available in Plastic and Ceramic Dual-in-Line Packages
CLK
RESET
DCDA
RxCB
DCDB
Cffij
TxCB
TxDB
RxDB
RTSB/SYNCB
WAITB/DRQTxA
D7
D6
D5
D4
D3
D2
Dl
DO
VSS
1 40
2 39
3 3B
4 37
5 36
6 35
7
8 33
9
10 ~PD
11 7201
12
32
31
30
29
13
14
15
16
17
18
19
'2-0
=
-
-
-
-
-
21
-'
VCC
CTSA
RTSA
TxDA
TxCA
RxCA
RxDA
SYNCA
WAiTA/DRQRxA
DTRA/HAO
J5R0/DRQTxB
PRI/DRQRxB
INT
INTA
DTRB/HAf
B/A
C/O
CS
RD
WR
II
483
|
| |
 
AC CHARACTE R ISTICS T a = O°C to +70°C; VCC = +5V ±10%
PARAMETER
Clock Cycle
Clock High Width
Clock Low Width
Clock Rise and Fall Time
Address Setup to RD
Address Hold from RD
RD Pulse Width
Data Delay from Address
Data Delay from RD
Output Float Delay
Address Setup to WR
Address Hold from WR
WR Pulse Width
Data Setup to WR
Data Hold from WR
PRO Delay from INTA
PRI Setup to INTA
PRI Hold from INTA
INTA Pulse Width
PRO Delay from PR I
Data Delay from INTA
Request Hold from RD/WR
HAl Setup to RD/WR
HAl Hold from RD/WR
HAO Delay from HAl
Recovery Time Between Controls
WAIT Delay from Address
Data Clock Cycle
Data Clock low Width
Data Clock High Width
Tx Data Delay
Data Set up to RxC
Data Hold from RxC
INT Delay Time from TxC
INT Delay Time from RxC
low Pulse Width
High Pulse Width
External INT from CST, DCD, SYNC
Delay from RxC to SYNC
}J. PD7201
SYMBOL
tCY
tCH
tCl
t r, tf
tAR
tRA
tRR
tAD
tRD
tDF
tAW
tWA
tww
tDW
tWD
tlAPO
tplN
tiP
til
tplPO
tID
tco
tlR
tRl
tHIHO
tRV
tcw
tDCY
tDCl
tDCH
tTO
tos
tDH
tlTD
tlRD
tpi.
tpH
tlPD
tDRxC
LIMITS
MIN MAX
250 4000
105 2000
105 2000
0 30
0
0
250
200
200
10 100
0
0
250
150
0
200
0
0
250
100
200
150
300
0
100
300
120
400
180
180
300
0
140
4-6
7 - 11
200
200
500
100
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tCY
tCY
ns
ns
ns
ns
II
487
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Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for UPD7201 electronic component. |
| Information | Total 12 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ UPD7201.PDF Datasheet ] | |
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