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PDF UPD416-3 Data sheet ( Hoja de datos )
| Número de pieza | UPD416-3 | |
| Descripción | 16384 x 1 Bit DYNAMIC NMOS RAM | |
| Fabricantes | NEC | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de UPD416-3 (archivo pdf) en la parte inferior de esta página. Total 9 Páginas | ||
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NEe Microcomputers, Inc.
18384 x 1 BIT DYNAMIC MOS
RANDOM ACCESS MEMORY
NEe
f' PD416
P. PD416·1
f' PD416·2
f'PD416·3
J.L PD416·5
DESCPIIIPTION
The NECI1PD416 is a 16384 words by 1 bit Dynamic MOS RAM. It is designed for
memory applications where very low cost and large bit storage are important design
objectives.
The I1PD416 .is fabr,icated using a double-poly-layer N channel silicon gate process
which affords high -storage cell density and high performance. The use of dynamic
circuitry throughout, including the sense amplifiers, assures minirnal power dissipation.
II
Multiplexed address inputs permit the IlPD416 to be packaged in the standard 16 pin
dual-in-line package. The 16 pin package provides the highest system bit densities and
is available in either ceramic or plastic. Noncritical clock timing requirements allow
use of the multiplexing technique while maintaining high perforrnance.
F I!:AT U iii ES
• 16384 Words x 1 Bit Organization
• High Memory Density - 16 Pin Ceramic and Plastic Packages
• Multiplexed Address Inputs
• Standard Power Supplies +12V, - 5V, +5V
• Low Power Dissipation; 462 mW Active (MAX)' 40 mW Standby (MAX)
• Output Data Controlled by CA'S and Unlatched at End of Cycle
• Read-Modify-Write, RAS-only Refresh, and Page Mode Capability
• All Inputs TTL Compatible, and Low Capacitance
• 128 Refresh Cycles
• 5 Perform~nce Ranges:
I1PD416
_- I1PD416-1
.. I1PD416-2
I1PD416-3
I1PD416-5
ACCESS liME
300 ns
250 n$ ~
200 ns
150 ns
120 ns
RIW CYCLE
510 ns
410 ns
375 ns
375 ns
320 ns
RMW CYCLE
575 ns
465 ns
375 ns
375 ns
320 ns
PIN CONFIGURATION
vBB
DIN
WRITE
RAS
AO
A2
Al
VDD
Vss
CAS
DOUT
A6
A3
A4
A5
Vee
AO-A6
CAS
DIN
DOUT
RAS
WRITE
VBe
VCC
VDD
VSS
Address Inputs
Column Address Strobe
Data In
Data Out
Row Address Strobe"
ReadlWrite
Power (-5Vl
Power (+5Vl
Power (+12Vl
Ground
Rev/2
27
1 page  
DERATING CURVES
CYCLE TIME tRC Ins)
320
1000 I 500 40~ 1375 I~OO 250
70 --TaIMAX)
1-'"
:C:;l;.
~ 60
I-
Zw
i::i;i;
<{ 50
o
1.0
2.0
'"
3.0 4.0
CYCLE RATE IMHz) = 10 3 /tRC Ins)
FIGURE 1
Maximum ambient temperature versus cycle
rate for extended frequency operation. Ta
lmax) for operation at cycling rates greater
than 2.66 MHz ItCYC < 375 ns) is deter·
minAd by Ta Imax) ['C] = 70 - 9.0 x
Icye!e 'ate [MHz] -2.661. For j.LP0416-5.
it is Ta Imax) ['C] = 70 - 9.0 Icycle rate
[MHz] - 3.1251.
JL PD416
50 mA
CYCLE TIME tRC Ins)
320
1000
500 400 375 300 250
j.LP0416· 5
«
E 40 mA
I-
Z
w
ccrr::
::J 30mA
U
>-
...J
Cl.
Cl.
::J
'"Ci 20 rnA
_0
:X«:;; 10 mA
SPEC LIMIT
""
././ ),
'9" t .'<rI"~~"'-""-\'"q!.t/."'<~1~ ./
+Gey ./
./~qy'::<C:,
./
,7 ./'
./
./ "'./
.,'
,/
II
a
a 1.0 2.0 3.0
CYCLE RATE 1M Hz) = 10 3 /tRC Ins)
4.0
FIGURE 2
Maximum 1001 versus cycle rate for device
operation at extended frequencies.
50 mA
CYCLE TI ME t RC Ins)
1000
I
320
I 500 400
300 250
375
50mA
1000
CYCLE TIME tpc Ins)
500 400
300 250
200 160
40mA
j.LP04!J5 -_<{e
40mA
30 mA
20 mA
10mA
o
SPEC LIMIT
,\"0.<" ~".
I r-: "'.",.').oo{,~<:::I-G;f~Ro.".o'."{. ~o~.'\~
" 10-"
.",."
"
.",.'"
.",.'
.",.
Ii!
ccwrr::
::J 30mA
U
>-
..J
Cl.
Cl.
...::J
'" 20mA
oo
x
~ lamA
-
a
o 1.0 2.0 3.0 4.0
a
CYCLE RATE IMHz) = 103/tRC Ins)
SPEC LIMIT
--- ----I--
,'II' _
1.0 2.0 3.0 4.0
CYCLE RATE IMHz) = 103/tRC Ins)
5.0
FIGURE 3
Maximum 1003 versus cycle rate for device
operation at extended frequencies.
FIGURE 4
Maximum 1004 versus cycle rate for device
operation in page mode.
6.0
31
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet UPD416-3.PDF ] | |
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