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PDF EDMGRB8KJF Data sheet ( Hoja de datos )
| Número de pieza | EDMGRB8KJF | |
| Descripción | Display Module | |
| Fabricantes | Panasonic | |
| Logotipo |  |
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REVISIONS
REV DESCRIPTION
AA DOCUMENT CREATED AND RELEASED PER PNR P00-0109
PANASONIC EDMGRB8KJF
DRAWN DATE APPROVED
SJD 6/27/00 RWT 6/28/2000
1 GENERAL REQUIREMENTS:
1.1 PURCHASING - THIS IS A SOURCE CONTROLLED COMPONENT. REFER TO THE APPROVED
COMPONENT LISTING (ACL) FOR AUTHORIZED MANUFACTURERS. IF A SPECIFICATION CONFLICT
EXISTS, THIS COMPONENT DRAWING HAS PRIORITY OVER OTHER DOCUMENTS.
1.2 MANUFACTURER TESTING - MANUFACTURER SHALL GUARANTEE DEVICES SUPPLIED TO THIS
DRAWING ARE CAPABLE OF MEETING THE ELECTRICAL AND MECHANICAL SPECIFICATIONS
STATED WITHIN THIS DOCUMENT. BUT, MANUFACTURER DOES NOT NEED TO TEST TO THESE
REQUIREMENTS UNLESS REQUESTED BY OEM.
1.3 ESD PROTECTION - ALL OEM COMPONENTS ARE TREATED AS ELECTROSTATIC SENSITIVE
COMPONENTS. COMPONENTS SHALL BE WRAPPED OR PACKAGED TO PREVENT DAMAGE FROM
ELECTROSTATIC DISCHARGE DURING TRANSIT AND HANDLING IN ACCORDANCE WITH ANSI/EIA
625 SECTION 8.
1.4 PART IDENTIFICATION - MANUFACTURER’S STANDARD MARKING (EXAMPLE, PART NUMBER AND
DATE CODE) SHALL BE PERMANENT AND LEGIBLE IN ACCORDANCE WITH EIA-327-A, UNLESS
WAIVED BY PURCHASE ORDER.
1.5 SHIPPING - IN ANY ONE SHIPMENT OF ANY PURCHASED ORDER, ALL DEVICES MUST BE OF ONLY
ONE TYPE OF PACKAGE. EACH SHIPPING CONTAINER MUST HAVE A BAR CODE, CONFORMING
TO ANSI / EIA-556 STANDARD, AND HUMAN READABLE DATA MARKED ON THE OUTSIDE OF THE
CONTAINER. THE INFORMATION CONTAINED ON THE LABEL WILL CONFORM TO DOCUMENT
#M0101, (OEM PACKAGING SPECIFICATION).
1 page  
PANASONIC EDMGRB8KJF
2.3 PINOUT AND SIGNAL DESCRIPTIONS - The pinout and signal descriptions of the module shall be as
shown below.
PIN NUMBER
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
SIGNAL
D7
D6
D5
D4
VSS
D3
D2
D1
D0
VDD
VDD
CP
VDD
LOAD
GND
DISPON
VSS
VCON
VSS
FRM
PIN NUMBER
1
2
3
SIGNAL
HIGH
N.C.
GND
PIN NUMBER
1
2
3
4
SIGNAL
X2
Y1
X1
Y2
CN1 LCD INTERFACE
DESCRIPTION
Display data
Display data
Display data
Display data
GND (0V)
Display data
Display data
Display data
Display data
Power supply for logic
Power supply for logic
Data shift clock
Power supply for logic
Data latch signal
GND (0V)
Display control signal (H:on/L:off)
GND (0V)
Power supply for LCD driving (whiter at lower voltages)
GND (0V)
Frame initialize signal
CN2 CCFT INTERFACE
DESCRIPTION
Power supply for cold cathode tube (high voltage)
No connect
Power supply for cold cathode tube (ground)
TTP INTERFACE
DESCRIPTION
5 Page 
3.6 ELECTRICAL SPECIFICATIONS
PANASONIC EDMGRB8KJF
3.6.1 Absolute Maximum Ratings (VDD VCON VSS = 0V)
PARAMETER
MNEMONIC MINIMUM TYPICAL MAXIMUM UNIT
Power Supply for Logic
VDD - VSS 0
- 6.0
V
Power Supply for LCD Drive VCON - VSS 0
- VDD
V
Input Logic Level
VIN -0.3
- VDD + 0.3 V
3.6.2 Recommended Operating Range (VDD VCON VSS = 0V)
PARAMETER
MNEMONIC MINIMUM TYPICAL MAXIMUM UNIT
Power Supply for
Logic(VSS=0V)
VDD - VSS
4.75
3.15
5.00 5.25
3.30 3.45
V
V
Power Supply for LCD Drive VCON - VSS 0.80
1.95 2.80
V
Frame Frequency
f(FRM)
60
70 120
Hz
11 Page | ||
| Páginas | Total 19 Páginas | |
| PDF Descargar | [ Datasheet EDMGRB8KJF.PDF ] | |
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