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PDF ADJD-J883 Data sheet ( Hoja de datos )
| Número de pieza | ADJD-J883 | |
| Descripción | Color Management Controller | |
| Fabricantes | AVAGO | |
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ADJD-J883
Color Management Controller with Integrated RGB Photosensor
Data Sheet
Description
The ADJD-J883 is a CMOS mixed-signal IC with integrated
RGB photosensors designed to be the optical feedback
device of an RGB LED-based backlighting system. A
typical system consists of an array of red, green and blue
(RGB) LEDs, LED drivers and the ADJD-J883. The device
samples the light output from the RGB LED array, pro-
cesses the color information and adjusts the light output
from the RGB LEDs until the target color is achieved. To
achieve this, the device integrates an RGB photosensor
array, an analog-to-digital converter front-end, a color
data processing logic core and a high-resolution 12-bit
PWM output generator.
By employing a feedback system and the ADJD-J883,
the light output produced by the LED array maintains
its color over time and temperature. In addition, using
a serial interface, specifying the color of the LED array’s
light output is as simple as picking the target color co-
ordinates from the CIE color space and writing several
bytes of data to the device.
The sensitivity of the device to light can be adjusted
through an automated process. The PWM output signals
control the on-time duration of the red, green and blue
LEDs. That duration is continually adjusted in real-time
to match the light output from the RGB LED array to the
target color.
Features
• Integrated RGB photosensor
• Integrated color management feedback controller
• Serial Interface
• Direct interface to standard I2C EEPROM
• 3-channel 12-bit PWM output –
Red, Green and Blue LED channels
• Built-in oscillator
Applications
• Architectural lighting
• Decorative/mood lighting
• Commercial lighting
• Cabin lighting
• Cove lighting
• Contour lighting
ESD WARNING: Standard CMOS handling precautions should be observed to avoid static discharge.
AVAGO TECHNOLOGIES’ PRODUCTS AND SOFTWARE ARE NOT SPECIFICALLY DESIGNED, MANUFACTURED OR AUTHORIZED FOR SALE AS
PARTS, COMPONENTS OR ASSEMBLIES FOR THE PLANNING, CONSTRUCTION, MAINTENANCE OR DIRECT OPERATION OF A NUCLEAR FACILITY
OR FOR USE IN MEDICAL DEVICES OR APPLICATIONS. CUSTOMER IS SOLELY RESPONSIBLE, AND WAIVES ALL RIGHTS TO MAKE CLAIMS
AGAINST AVAGO TECHNOLOGIES OR ITS SUPPLIERS, FOR ALL LOSS, DAMAGE, EXPENSE OR LIABILITY IN CONNECTION WITH SUCH USE.
1 page  
High Level Description
A hardware reset (by asserting XRST) should be performed
before starting any operation. It is assumed that factory
calibration was performed prior deployment of ADJD-J883.
Calibration is discussed at the end of this section.
The user controls and configures the device by program-
ming a set of internal registers through a serial interface. At
the start of application, the following register data must be
written to it:
• Frequency registers
• Setup data
• Calibration data
• Bright and color input registers.
The register data is usually gathered during a calibration
process which is performed once in manufacturing. Factory
calibration is needed at a system level to map the integrated
tri-color sensor’s reading (device dependent) with a standard
device independent color space.
Once the register data is entered, the feedback operation
begins; the device starts to sample the RGB sensor using
the internal ADC. That data is compared to a user-controlled
color point target. The PWM duty factor for each channel is
adjusted in response to any error signal generated by that
comparison operation.
Thus, the actual color produced by the LEDs is maintained
close to the target.
There are three methods to operate the device. They are
differentiated by the technique in which the register data
is stored and used. The three figures below describe the
methods. NVPROM stands for Non-Volatile Programmable
Read-Only Memory such as an EEPROM.
Independent NVPROM
The NVPROM is independent from the device. During
factory calibration, the host must read the register data
from the device and write it to the NVPROM. At the start
of application, the host must read the register data from
the NVPROM and write it back to the device, after which
the device will wait for further instructions in normal
mode.
NVPROM
HOST
CONTROLLER
SDASLV
SCLSLV
DEVICE
Dedicated NVPROM in Interactive Mode
A dedicated NVPROM is connected to the device. During
factory calibration, the host can instruct the device to
upload the register data to the NVPROM. At the start of
application, the host can instruct the device to download
the register data from the NVPROM, after which the de-
vice will wait for further instructions in normal mode. The
serial interface protocol between device and NVPROM
is hard coded. A standard NVPROM such as a serial I2C
EEPROM with address 0x50 (7-bit) must be used.
HOST
CONTROLLER
SDASLV
SCLSLV
SDAPROM
DEVICE SCLPROM NVPROM
Dedicated NVPROM in Standalone Mode
A dedicated NVPROM is connected to the device. During
factory calibration, the host can instruct the device to
upload the register data to the NVPROM. The difference
versus Interactive Mode is that, in application, the device
itself will download the register data and immediately
after, enter normal mode. Then, it will start driving the
PWM channels to achieve a default target color point.
The default color point is programmed after factory
calibration. A host controller is not necessary during ap-
plication. The serial interface protocol between device
and NVPROM is hard coded. So, a standard NVPROM
such as a serial I2C EEPROM with address 0x50 (7-bit)
must be used.
DEVICE
SDAPROM
SCLPROM
NVPROM
5 Page 
Serial Interface Reference
Description
The programming interface to the ADJD-J883 is a 2-wire serial bus. The bus consists of a serial clock (SCL) and a serial
data (SDA) line. The SDA line is bi-directional on ADJD-J883 and must be connected through a pull-up resistor to the
positive power supply. When the bus is free, both lines are HIGH.
The 2-wire serial bus on ADJD-J883 requires one device to act as a master while all other devices must be slaves. A
master is a device that initiates a data transfer on the bus, generates the clock signal and terminates the data transfer
while a device addressed by the master is called a slave. Slaves are identified by unique device addresses.
Both master and slave can act as a transmitter or a receiver but the master controls the direction for data transfer. A
transmitter is a device that sends data to the bus and a receiver is a device that receives data from the bus.
The ADJD-J883 serial bus interface always operates as a slave transceiver with a data transfer rate of up to 100kbit/s.
START/STOP Condition
The master initiates and terminates all serial data transfers. To begin a serial data transfer, the master must send a
unique signal to the bus called a START condition. This is defined as a HIGH to LOW transition on the SDA line while
SCL is HIGH.
The master terminates the serial data transfer by sending another unique signal to the bus called a STOP condition.
This is defined as a LOW to HIGH transition on the SDA line while SCL is HIGH.
The bus is considered to be busy after a START (S) condition. It will be considered free a certain time after the STOP (P)
condition. The bus stays busy if a repeated START (Sr) is sent instead of a STOP condition.
The START and repeated START conditions are functionally identical.
SDA
SCL
S
START condition
Figure 2. START/STOP Condition
P
STOP condition
Data Transfer
The master initiates data transfer after a START condition. Data is transferred in bits with the master generating one
clock pulse for each bit sent. For a data bit to be valid, the SDA data line must be stable during the HIGH period of the
SCL clock line. Only during the LOW period of the SCL clock line can the SDA data line change state to either HIGH or
LOW.
SDA
SCL
Figure 3. Data Bit Transfer
Data valid
Data change
11
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