PDF TC55BS8128J-12 Data sheet ( Hoja de datos )

Número de pieza	TC55BS8128J-12
Descripción	128K x 8-Bit Synchronous Static RAM
Fabricantes	Toshiba
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No Preview Available ! TOSHIBA 131,072 WORD x 8 BIT SYNCHRONOUS STATIC RAM with Input Registers, Output Registers and Pass-Through Feature 1l:55~128J-I0/12 PRELIMINARY Description The TC55BS8128J is a 1,048,576 bit synchronous static random access memory fabricated using BiCMOS technology and organized as 131,072 words by 8 bits. The TC55BS8128J is similar to the TC55BS8125J but has separate data inputs and outputs and a write-cycle pass-through feature. Designed for pipelined architectures, this device has internal input and output registers which latch on the positive edge of an external clock (ClK). All address; data, and control signals are latched. The setup and hold times for the inputs are 2ns and 1ns respectively. Synchronous SRAMs can lead to faster, more robust system operation by virtually eliminating the timing skew problems associated with conventional asynchronous SRAMs. For example, write operations are internally self-timed when initiated - eliminating the need for accurate write pulse generation and timing by the memory controller or microprocessor. A pass-through feature during write cycles allows the outputs to follow the inputs with a one clock cycle delay. For read cycles, data is available one clock cycle after the address is latched. All inputs and outputs are TTL compatible. The TC55BS8128J is available in a 40-pin, 400mil SOJ package suitable for high density assembly. Features • Fast cycle time - TC55BS8128J-10 10ns (max.) - TC55BS8128J-12 12ns (max.) • Fast clock access time - TC55BS8128J-10 5ns (max.) - TC55BS8128J-12 6ns (max.) • Input and output registers for synchronous operation • Data pass-through for write cycles • Single power supply: 5V±10% • Separate data inputs and outputs • Package: JEDEC standard pinout - 40-pin, 400mil SOJ: SOJ40-P-400 Pin Names AO - A16 DO - 07 00-07 ClK CE WE V DD GND Address Inputs Data Inputs Data Outputs Clock Input Chip Enable Input Write Enable Input Power (+5V) Ground Pin Connection (Top View) TC55BS8128J A3 A2 Al AO CE DO 01 QO Ql VDO GND Q2 Q3 02 03 WE A16 A1S A14 A13 A4 AS A6 A7 A8 07 06 Q7 Q6 GND VDD QS Q4 OS 04 ClK A9 A10 All A12 TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC. C-13 1 page TC55BS8128J-10112 Timing Waveforms Read Cycle Standby Static RAM Read Read Read Write Cycle and Pass-Through Mode Standby tACK Write and Pass - Through Write and Pass - Through Pass - Through PRELIMINARY tACK TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC. C-17 5 Page

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Hoja de datos destacado

Número de pieza	Descripción	Fabricantes
TC55BS8128J-10	128K x 8-Bit Synchronous Static RAM	Toshiba
TC55BS8128J-12	128K x 8-Bit Synchronous Static RAM	Toshiba

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