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EDD10161BBH-TS fiches techniques PDF

Elpida Memory - 1G bits DDR Mobile RAM

Numéro de référence EDD10161BBH-TS
Description 1G bits DDR Mobile RAM
Fabricant Elpida Memory 
Logo Elpida Memory 





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EDD10161BBH-TS fiche technique
PRELIMINARY DATA SHEET
1G bits DDR Mobile RAM
WTR (Wide Temperature Range)
EDD10161BBH-TS (64M words × 16 bits)
Specifications
Density: 1G bits
Organization: 16M words × 16 bits × 4 banks
Package: 60-ball FBGA
Lead-free (RoHS compliant) and Halogen-free
Power supply: VDD, VDDQ = 1.7V to 1.95V
Data rate: 400Mbps/333Mbps (max.)
2KB page size
Row address: A0 to A13
Column address: A0 to A9
Four internal banks for concurrent operation
Interface: LVCMOS
Burst lengths (BL): 2, 4, 8
Burst type (BT):
Sequential (2, 4, 8)
Interleave (2, 4, 8)
/CAS Latency (CL): 3
Precharge: auto precharge option for each burst
access
Driver strength: normal, 1/2, 1/4
Refresh: auto-refresh, self-refresh
Refresh cycles: 8192 cycles/64ms
Average refresh period: 7.8µs
Operating ambient temperature range
TA = 25°C to +85°C
Features
DLL is not implemented
Low power consumption
Double-data-rate architecture; two data transfers per
one clock cycle
The high-speed data transfer is realized by the 2 bits
prefetch pipelined architecture
Bi-directional data strobe (DQS) is transmitted
/received with data for capturing data at the receiver.
Data inputs, outputs, and DM are synchronized with
DQS
DQS is edge-aligned with data for READs; center-
aligned with data for WRITEs
Differential clock inputs (CK and /CK)
Commands entered on each positive CK edge: data
and data mask referenced to both edges of DQS
Data mask (DM) for write data
Burst termination by burst stop command and
Precharge command
Wide temperature range
TA = 25°C to +85°C
Low Power Function below is not supported
Partal Array Self-Refresh (PASR)
Auto Temperature Compensated Self-Refresh
Deep power-down mode
Document No. E1444E30 (Ver. 3.0)
Date Published October 2009 (K) Japan
Printed in Japan
URL: http://www.elpida.com
Elpida Memory, Inc. 2008-2009

PagesPages 30
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