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UM2149 fiches techniques PDF

UMC - 1K x 4 High Speed NMOS SRAM

Numéro de référence UM2149
Description 1K x 4 High Speed NMOS SRAM
Fabricant UMC 
Logo UMC 





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UM2149 fiche technique
(l)UMC
UM2149
1K·· X 4 High Speed NMOS SRAM
Features
• 45 ns maximum address access
• Fully static operation:
No clocks or strobes required
• Fast chip select access time: 20ns max.
• Identical cycle and access times
• Single +5V supply
• Industry standard 2114 pinout
• Totally TTL compatible:
All inputs and outputs
• Common data input and outputs
Ii High density 18-pin package
• Three-state output
General Description
The UMC UM2149 is a 4096-8it Static Random Access
Memory organized 1024 words by 4 bits and is fabricated
using UMC's new N-channel Silicon-Gate HMOS technology.
It is designed using fully static circuitry, therefore requiring
no clock or refreshing to operate. Address set-up times
are not required and the data is read out non-destructively
with the same polarity as the input data. Common data
input and output pins provide maximum design flexibility.
The three-state output facilitates memory expansion by
allowing the outputs to be OR-tied to other devices.
The UM2149 offers a chip select access that is faster than
its address access. In a typical application, the'address
access begins as soon as the address is valid. At this time,
the high order addresses are decoded and the desired
memory is then selected. With the faster chip select access,
this decode time will not add to the overall access time thus
significantly improving system performance.
The UM2149 is packaged in an 18-pin DIP for the highest
possible density .. The device is fully TTL compatible and
has a single +5V power supply.
Pin Configuration
Block Diagram
Vee
A7
As
A9
1/01
1/0 2
1/03
1/04
WE
A4
As
A6
A7
As
A9
1/01
1/02
1/03
1/04
cs
MEMORY ARRAY
64 ROWS
64 COLUMNS
_Vcc
_GND
WE
2-13

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