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PDF CD4069UBMS Data sheet ( Hoja de datos )
| Número de pieza | CD4069UBMS | |
| Descripción | CMOS Hex Inverter | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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CD4069UBMS
December 1992
CMOS Hex Inverter
Features
Pinout
• High Voltage Types (20V Rating)
• Standardized Symmetrical Output Characteristics
CD4069UBMS
TOP VIEW
• Medium Speed Operation: tPHL, tPLH = 30ns (typ) at
10V
• 100% Tested for Quiescent Current at 20V
• Maximum Input Current of 1µA at 18V Over Full Pack-
age Temperature Range; 100nA at 18V and +25oC
• Meets All Requirements of JEDEC Tentative Standard
No. 13B, “Standard Specifications for Description of
‘B’ Series CMOS Devices”
Applications
A1
G=A 2
B3
H=B 4
C5
I=C 6
VSS 7
14 VDD
13 F
12 L = F
11 E
10 K = E
9D
8 J=D
• Logic Inversion
• Pulse Shaping
• Oscillators
Functional Diagram
• High-Input-Impedance Amplifiers
1
A
2
G=A
Description
CD4069UBMS types consist of six CMOS inverter circuits.
These devices are intended for all general-purpose inverter
applications where the medium-power TTL-drive and logic-
level conversion capabilities of circuits such as the CD4009
and CD4049 Hex Inverter/Buffers are not required.
The CD4069UBMS is supplied in these 14 lead outline pack-
ages:
3
B
5
C
9
D
4
H=B
6
I=C
8
J=D
Braze Seal DIP H4H
Frit Seal DIP
H1B
Ceramic Flatpack H3W
11
E
VSS = 7
13
F
VDD = 14
10
K=E
12
L=F
Schematic Diagram
A
1(3, 5, 9, 11, 13)
VDD
VDD
G=A
G
2(4, 6, 8, 10, 12)
VSS
FIGURE 1. SCHEMATIC DIAGRAM OF 1 OF 6 IDENTICAL INVERTERS
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
7-464
File Number 3321
1 page  
Specifications CD4069UBMS
TABLE 6. APPLICABLE SUBGROUPS (Continued)
CONFORMANCE GROUP
MIL-STD-883
METHOD
GROUP A SUBGROUPS
Group B
Subgroup B-5
Sample 5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas
Subgroup B-6
Sample 5005
1, 7, 9
Group D
Sample 5005
1, 2, 3, 8A, 8B, 9
NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.
READ AND RECORD
Subgroups 1, 2, 3, 9, 10, 11
Subgroups 1, 2 3
CONFORMANCE GROUPS
Group E Subgroup 2
TABLE 7. TOTAL DOSE IRRADIATION
MIL-STD-883
METHOD
TEST
PRE-IRRAD
POST-IRRAD
5005
1, 7, 9
Table 4
READ AND RECORD
PRE-IRRAD
POST-IRRAD
1, 9 Table 4
TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS
FUNCTION
Static Burn-In 1
(Note 1)
OPEN
GROUND
2, 4, 6, 8, 10, 12 1, 3, 5, 7, 9, 11,
13
VDD
14
9V ± -0.5V
OSCILLATOR
50kHz
25kHz
Static Burn-In 2
(Note 1)
2, 4, 6, 8, 10, 12 7 1, 3, 5, 9, 11, 13,
14
Dynamic Burn-In
(Note 1)
- 7 14 2, 4, 6, 8, 10, 12 1, 3, 5, 9, 11, 13
Irradiation
(Note 2)
2, 4, 6, 8, 10, 12 7 1, 3, 5, 9, 11, 13,
14
NOTES:
1. Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V
2. Each pin except VDD and GND will have a series resistor of 47K ± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures,
VDD = 10V ± 0.5V
Typical Performance Characteristics
AMBIENT TEMPERATURE (TA) = +25oC
SUPPLY VOLTAGE
(VDD) = 15V
15.0
VI
12.5
10V
10.0
7.5
5V
5.0
2.5
VO
17.5
15.0
SUPPLY VOLTAGE
(VDD) = 15V
12.5
10V
10.0
+125oC
7.5
-55oC
AMBIENT
= +125oC
TEMPERATURE
(TA)
-55oC
5.0 5V -55oC
2.5
0 2.5
5.0 7.5
10.0 12.5 15.0
INPUT VOLTAGE (VI) (V)
0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0
INPUT VOLTAGE (VI) (V)
FIGURE 2. MINIMUM AND MAXIMUM VOLTAGE TRANSFER
CHARACTERISTICS
FIGURE 3. TYPICAL VOLTAGE TRANSFER CHARACTERIS-
TICS AS A FUNCTION OF TEMPERATURE
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
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