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PDF FCH76N60N Data sheet ( Hoja de datos )
| Número de pieza | FCH76N60N | |
| Descripción | MOSFET ( Transistor ) | |
| Fabricantes | Fairchild Semiconductor | |
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FCH76N60N
N-Channel SupreMOS® MOSFET
600 V, 76 A, 36 mΩ
November 2013
Features
• RDS(on) = 28 mΩ (Typ.) @ VGS = 10 V, ID = 38 A
• Ultra Low Gate Charge (Typ. Qg = 218 nC)
• Low Effective Output Capacitance (Typ. Coss(eff.) = 914 pF)
• 100% Avalanche Tested
• RoHS Compliant
Application
• Solar Inverter
• AC-DC Power Supply
Description
The SupreMOS® MOSFET is Fairchild Semiconductor’s next
generation of high voltage super-junction (SJ) technology
employing a deep trench filling process that differentiates it from
the conventional SJ MOSFETs. This advanced technology and
precise process control provides lowest Rsp on-resistance,
superior switching performance and ruggedness. SupreMOS
MOSFET is suitable for high frequency switching power con-
verter applications such as PFC, server/telecom power, FPD TV
power, ATX power and industrial power applications.
D
G
D
S
TO-247
G
S
MOSFET Maximum Ratings TC = 25oC unless otherwise noted.
Symbol
VDSS
VGSS
ID
IDM
EAS
IAR
EAR
dv/dt
PD
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current
Drain Current
- Continuous (TC = 25oC)
- Continuous (TC = 100oC)
- Pulsed
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
MOSFET dv/dt
Peak Diode Recovery dv/dt
Power Dissipation
(TC = 25oC)
- Derate above 25oC
(Note 1)
(Note 2)
(Note 1)
(Note 1)
(Note 3)
TJ, TSTG
Operating and Storage Temperature Range
TL Maximum Lead Temperature for Soldering, 1/8” from Case for 5 Seconds
*Drain current limited by maximum junction temperature
Thermal Characteristics
Symbol
RθJC
RθJA
Parameter
Thermal Resistance, Junction to Case, Max.
Thermal Resistance, Junction to Ambient, Max.
FCH76N60N
600
±30
76
48.1
228
8022
25.3
5.43
100
20
543
4.34
-55 to +150
300
FCH76N60N
0.23
40
Unit
V
V
A
A
mJ
A
mJ
V/ns
W
W/oC
oC
oC
Unit
oC/W
©2011 Fairchild Semiconductor Corporation
FCH76N60N Rev. C3
1
www.fairchildsemi.com
1 page  
IG = const.
Figure 12. Gate Charge Test Circuit & Waveform
V10GVS
VDS
VGS
RG
RL
VDD
VDS
90%
DUT
VGS 10%
td(on)
tr
t on
Figure 13. Resistive Switching Test Circuit & Waveforms
td(off)
tf
t off
VGS
Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms
©2011 Fairchild Semiconductor Corporation
FCH76N60N Rev. C3
5
www.fairchildsemi.com
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet FCH76N60N.PDF ] | |
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