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National Semiconductor - Quad TRI-STATE NOR(NAND) R/S Latches

Numéro de référence CD4044BM
Description Quad TRI-STATE NOR(NAND) R/S Latches
Fabricant National Semiconductor 
Logo National Semiconductor 





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CD4044BM fiche technique
February 1988
CD4043BM CD4043BC Quad TRI-STATE
NOR R S Latches
CD4044BM CD4044BC Quad TRI-STATE
NAND R S Latches
General Description
CD4043BM CD4043BC are quad cross-couple TRI-STATE
CMOS NOR latches and CD4044BM CD4044BC are quad
cross-couple TRI-STATE CMOS NAND latches Each latch
has a separate Q output and individual SET and RESET
inputs There is a common TRI-STATE ENABLE input for all
four latches A logic ‘‘1’’ on the ENABLE input connects the
latch states to the Q outputs A logic ‘‘0’’ on the ENABLE
input disconnects the latch states from the Q outputs result-
ing in an open circuit condition on the Q output The
TRI-STATE feature allows common bussing of the outputs
Features
Y Wide supply voltage range
3V to 15V
Y Low power
100 nW (typ )
Y High noise immunity
0 45 VDD (typ )
Y Separate SET and RESET inputs for each latch
Y NOR and NAND configuration
Y TRI-STATE output with common output enable
Applications
Y Multiple bus storage
Y Strobed register
Y Four bits of independent storage with output enable
Y General digital logic
Connection Diagrams
CD4043BM CD4043BC
Dual-In-Line and Flat Packages
CD4044BM CD4044BC
Dual-In-Line and Flat Packages
Top View
Truth Table
TL F 5967 – 3
CD4043BM CD4043BC
SRE
Q
X X 0 OC
0 0 1 NC
101
1
011
0
111
D
CD4044BM CD4044BC
SRE
Q
X X 0 OC
1 1 1 NC
011
1
101
0
0 0 1 DD
Top View
TL F 5967 – 4
Order Number CD4043B or CD4044B
OC TRI-STATE
NC No change
X Don’t care
D Dominated by Se1 input
DD Dominated by Re0 input
C1995 National Semiconductor Corporation TL F 5967
RRD-B30M105 Printed in U S A

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