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PDF FDMA3027PZ Data sheet ( Hoja de datos )
| Número de pieza | FDMA3027PZ | |
| Descripción | MOSFET ( Transistor ) | |
| Fabricantes | Fairchild Semiconductor | |
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FDMA3027PZ
Dual P-Channel PowerTrench® MOSFET
-30 V, -3.3 A, 87 mΩ
July 2014
Features
General Description
Max rDS(on) = 87 mΩ at VGS = -10 V, ID = -3.3 A
Max rDS(on) = 152 mΩ at VGS = -4.5 V, ID = -2.3 A
HBM ESD protection level > 2 KV typical (Note 3)
Low profile - 0.8 mm maximum - in the new package
MicroFET 2x2 mm
RoHS Compliant
This device is designed specifically as a single package solution
for dual switching requirements such as gate driver for larger
Mosfets. It features two independent P-Channel MOSFETs with
low on-state resistance for minimum conduction losses. The
MicroFET 2x2 package offers exceptional thermal performance
for its physical size and is well suited to linear mode applications.
G-S zener has been added to enhance ESD voltage level.
Applications
Load Switch
Discrete Gate Driver
PIN 1
S1 G1 D2
D1 D2
S1 1
G1 2
6 D1
5 G2
D1 G2 S2
Top Bottom
MicroFET 2x2
D2 3
4 S2
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
VGS
ID
PD
TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous
-Pulsed
Power Dissipation
Power Dissipation
Operating and Storage Junction Temperature Range
Thermal Characteristics
(Note 1a)
(Note 1a)
(Note 1b)
Ratings
-30
±25
-3.3
-15
1.4
0.7
-55 to +150
Units
V
V
A
W
°C
RθJA
Thermal Resistance for Single Operation, Junction to Ambient
Thermal Resistance for Single Operation, Junction to Ambient
Thermal Resistance for Dual Operation, Junction to Ambient
Thermal Resistance for Dual Operation, Junction to Ambient
Thermal Resistance for Single Operation, Junction to Ambient
Thermal Resistance for Dual Operation, Junction to Ambient
Package Marking and Ordering Information
(Note 1a)
(Note 1b)
(Note 1c)
(Note 1d)
(Note 1e)
(Note 1f)
86
173
69
151
160
133
°C/W
Device Marking
327
Device
FDMA3027PZ
Package
MicroFET 2X2
Reel Size
7 ’’
Tape Width
8 mm
Quantity
3000 units
©2012 Fairchild Semiconductor Corporation
FDMA3027PZ Rev.C1
1
www.fairchildsemi.com
1 page  
Typical Characteristics TJ = 25 °C unless otherwise noted
10
ID = -3.3 A
8
6
VDD = -15 V
VDD = -10 V
VDD = -20 V
4
2
0
0246
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
8
10-1
10-2 VDS = 0 V
10-3
10-4
10-5
TJ = 125 oC
10-6
10-7 TJ = 25 oC
10-8
10-9
0 4 8 12 16 20 24 28 32
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 9. Gate Leakage Current vs Gate to
Source Voltage
30
1000
Ciss
100
Coss
Crss
f = 1 MHz
VGS = 0 V
10
0.1 1 10
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure8. CapacitancevsDrain
to Source Voltage
20
10
30
1 1 ms
THIS AREA IS
LIMITED BY rDS(on)
0.1 SINGLE PULSE
TJ = MAX RATED
RθJA = 173 oC/W
TA = 25 oC
0.01
0.1
1
10
10 ms
100 ms
1s
10 s
DC
100
-VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 10. Forward Bias Safe
Operating Area
10
SINGLE PULSE
1 RθJA = 173 oC/W
TA = 25 oC
0.5
10-3
10-2
10-1
1
10
t, PULSE WIDTH (sec)
Figure 11. Single Pulse Maximum Power Dissipation
100
1000
©2012 Fairchild Semiconductor Corporation
FDMA3027PZ Rev.C1
5
www.fairchildsemi.com
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet FDMA3027PZ.PDF ] | |
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