AD7656-1 Datasheet PDF - Analog Devices
| Part Number | AD7656-1 | |
| Description | 16-/14-/12-Bit ADC | |
| Manufacturers | Analog Devices | |
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Data Sheet
250 kSPS, 6-Channel, Simultaneous
Sampling, Bipolar, 16-/14-/12-Bit ADC
AD7656-1/AD7657-1/AD7658-1
FEATURES
Pin and software compatible with AD7656/AD7657/AD7658
featuring reduced decoupling requirements
6 independent ADCs
True bipolar analog inputs
Pin-/software-selectable ranges: ±10 V, ±5 V
Fast throughput rate: 250 kSPS
iCMOS process technology
Low power
140 mW at 250 kSPS with 5 V supplies
High noise performance with wide bandwidth
88 dB SNR at 10 kHz input frequency
On-chip reference and reference buffers
High speed parallel, serial, and daisy-chain interface modes
High speed serial interface
SPI/QSPI™/MICROWIRE™/DSP compatible
Standby mode: 315 µW maximum
64-lead LQFP
APPLICATIONS
Power line monitoring and measuring systems
Instrumentation and control systems
Multiaxis positioning systems
GENERAL DESCRIPTION
The AD7656-1/AD7657-1/AD7658-11 are reduced decoupling pin-
and software-compatible versions of AD7656/AD7657/AD7658.
The AD7656-1/AD7657-1/AD7658-1 devices contain six 16-/
14-/12-bit, fast, low power successive approximation ADCs in
a package designed on the iCMOS® process (industrial CMOS).
iCMOS is a process combining high voltage silicon with submicron
CMOS and complementary bipolar technologies. It enables the
development of a wide range of high performance analog ICs
capable of 33 V operation in a footprint that no previous generation
of high voltage parts could achieve. Unlike analog ICs using conven-
tional CMOS processes, iCMOS components can accept bipolar
input signals while providing increased performance, which
dramatically reduces power consumption and package size.
The AD7656-1/AD7657-1/AD7658-1 feature throughput rates
of up to 250 kSPS. The parts contain low noise, wide bandwidth
track-and-hold amplifiers that can handle input frequencies
up to 4.5 MHz.
FUNCTIONAL BLOCK DIAGRAM
VDD CONVST A CONVST B CONVST C AVCC DVCC
REF
CLK
OSC
CONTROL
LOGIC
V1 T/H
BUF
16-/14-/
12-BIT SAR
OUTPUT
DRIVERS
CS
SER/PAR SEL
VDRIVE
STBY
DB8/DOUT A
V2 T/H
V3 T/H
BUF
16-/14-/
12-BIT SAR
16-/14-/
12-BIT SAR
OUTPUT
DRIVERS
OUTPUT
DRIVERS
DB6/SCLK
DB9/DOUT B
DB10/DOUT C
V4 T/H
V5 T/H
V6 T/H
BUF
16-/14-/
12-BIT SAR
16-/14-/
12-BIT SAR
OUTPUT
DRIVERS
DATA/
CONTROL
LINES
RD
16-/14-/
12-BIT SAR
AD7656-1/AD7657-1/AD7658-1
WR/REFEN/DIS
VSS AGND DGND
Figure 1.
The conversion process and data acquisition are controlled
using the CONVST signals and an internal oscillator. Three
CONVST pins (CONVST A, CONVST B, and CONVST C)
allow independent, simultaneous sampling of the three ADC
pairs. The AD7656-1/AD7657-1/AD7658-1 have a high speed
parallel and serial interface, allowing the devices to interface with
microprocessors or DSPs. When the serial interface is selected,
each part has a daisy-chain feature that allows multiple ADCs to
connect to a single serial interface. The AD7656-1/AD7657-1/
AD7658-1 can accommodate true bipolar input signals in the
±4 × VREF and ±2 × VREF ranges. Each AD7656-1/AD7657-1/
AD7658-1 also contains an on-chip 2.5 V reference.
PRODUCT HIGHLIGHTS
1. Six 16-/14-/12-bit, 250 kSPS ADCs on board.
2. Six true bipolar, high impedance analog inputs.
3. High speed parallel and serial interfaces.
4. Reduced decoupling requirements and reduced bill of
materials cost compared with the AD7656/AD7657/
AD7658 devices.
1 Protected by U.S. Patent No. 6,731,232.
Rev. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2008–2012 Analog Devices, Inc. All rights reserved.
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Data Sheet
AD7656-1/AD7657-1/AD7658-1
AD7657-1
VREF = 2.5 V internal/external, AVCC = 4.75 V to 5.25 V, DVCC = 4.75 V to 5.25 V, VDRIVE = 2.7 V to 5.25 V; for the ±4 × VREF range, VDD =
10 V to 16.5 V, VSS = −10 V to −16.5 V; for the ±2 × VREF range, VDD = 5 V to 16.5 V, VSS = −5 V to −16.5 V; fSAMPLE = 250 kSPS, TA = TMIN to
TMAX, unless otherwise noted.
Table 2.
Parameter
DYNAMIC PERFORMANCE
Signal-to-(Noise + Distortion)
(SINAD)1
Signal-to-Noise Ratio (SNR)1
Total Harmonic Distortion (THD)1
Peak Harmonic or Spurious Noise
(SFDR)1
Intermodulation Distortion (IMD)1
Second-Order Terms
Third-Order Terms
Aperture Delay
Aperture Delay Matching
Aperture Jitter
Channel-to-Channel Isolation1
Full-Power Bandwidth
DC ACCURACY
Resolution
No Missing Codes
Integral Nonlinearity1
Positive Full-Scale Error1
Positive Full-Scale Error Matching1
Bipolar Zero-Scale Error1
Bipolar Zero-Scale Error Matching1
Negative Full-Scale Error1
Negative Full-Scale Error Matching1
ANALOG INPUT
Input Voltage Ranges
DC Leakage Current
Input Capacitance2
REFERENCE INPUT/OUTPUT
Reference Input Voltage Range
DC Leakage Current
Input Capacitance2
Reference Output Voltage
Long-Term Stability
Reference Temperature Coefficient
LOGIC INPUTS
Input High Voltage (VINH)
Input Low Voltage (VINL)
Input Current (IIN)
Input Capacitance (CIN)2
Min Typ
82.5
83.5
−105
−100
−109
−104
35
−100
4.5
2.2
14
14
±1
−4 × VREF
−2 × VREF
10
14
2.5
18.5
2.49
150
6
0.7 × VDRIVE
Max
−90
10
4
±1
±0.95
±0.366
±0.04
±0.0427
±0.95
±0.366
+4 × VREF
+2 × VREF
±1
2.5
±1
2.51
25
0.3 × VDRIVE
±10
10
Unit
dB
dB
dB
dB
dB
dB
dB
ns
ns
ps
dB
MHz
MHz
Bits
Bits
LSB
% FSR
% FSR
% FSR
% FSR
% FSR
% FSR
V
V
µA
pF
pF
V
µA
pF
V
ppm
ppm/°C
ppm/°C
V
V
µA
pF
Test Conditions/Comments
fIN = 10 kHz sine wave
fa = 10.5 kHz, fb = 9.5 kHz
fIN on unselected channels up to 100 kHz
@ −3 dB
@ −0.1 dB
±0.27% FSR typical
±0.016% FSR typical
±0.27% FSR typical
See Table 8 for minimum VDD/VSS for each range
RNGx bits or RANGE pin = 0
RNGx bits or RANGE pin = 1
±4 × VREF range when in track
±2 × VREF range when in track
REFEN/DIS = 1
1000 hours
Typically 10 nA, VIN = 0 V or VDRIVE
Rev. D | Page 5 of 32
Preview 5 Page |
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| Information | Total 30 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ AD7656-1.PDF Datasheet ] | |
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