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CD4025BM fiches techniques PDF

National Semiconductor - Buffered Triple 3-Input NAND/NOR Gate

Numéro de référence CD4025BM
Description Buffered Triple 3-Input NAND/NOR Gate
Fabricant National Semiconductor 
Logo National Semiconductor 





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CD4025BM fiche technique
February 1988
CD4023BM CD4023BC
Buffered Triple 3-Input NAND Gate
CD4025BM CD4025BC
Buffered Triple 3-Input NOR Gate
General Description
These triple gates are monolithic complementary MOS
(CMOS) integrated circuits constructed with N- and P-chan-
nel enhancement mode transistors They have equal source
and sink current capabilities and conform to standard B se-
ries output drive The devices also have buffered outputs
which improve transfer characteristics by providing very
high gain All inputs are protected against static discharge
with diodes to VDD and VSS
Features
Y Wide supply voltage range
3 0V to 15V
Y High noise immunity
Y Low power TTL
0 45 VDD (typ )
fan out of 2 driving 74L
compatibility
or 1 driving 74LS
Y 5V – 10V – 15V parametric ratings
Y Symmetrical output characteristics
Y Maximum input leakage 1 mA at 15V over full
temperature range
Connection Diagrams
CD4023BM CD4023BC
Dual-In-Line Package
CD4025BM CD4025BC
Dual-In-Line Package
Top View
TL F 5956 – 1
Order Number CD4023B or CD4025B
Top View
TL F 5956 – 2
C1995 National Semiconductor Corporation TL F 5956
RRD-B30M105 Printed in U S A

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