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PDF AD9352-5 Data sheet ( Hoja de datos )

Número de pieza AD9352-5
Descripción WiMAX RF MxFE Transceiver
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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FEATURES
RF transceiver with integrated ADCs and DACs
Frequency: 4.9 GHz to 6.0 GHz
3.5 MHz < BW < 20 MHz
Superior receiver sensitivity with an NF of 4.5 dB
Highly linear and spectrally pure transmitter
Tx EVM: −36 dB
Tx noise floor: <−134dBm/Hz
Autonomous automatic gain control (AGC)
Automatic frequency correction: <0.012 ppm
Integrated fractional-N synthesizer
28 Hz local oscillator (LO) step size
Integrated phase noise: <0.8°rms
APPLICATIONS
CPE
BWA/WiMAX infrastructure
Wireless backhaul
Radar detect
GENERAL DESCRIPTION
The AD9352-5 is a fully integrated transceiver for IEEE 802.16
WiMAX wireless network systems. The RF MxFE® combines
the RF front end with mixed-signal baseband enabling and
easy-to-use digital interface to the baseband ASIC or FPGA.
The AD9352-5 operates in the 4.9 GHz to 6.0 GHz range
covering most of the licensed and unlicensed bands. Channel
bandwidths of 3.5 MHz, 4.375 MHz, 5 MHz, 7 MHz, 8.75 MHz,
10 MHz, 14 MHz, 17.5 MHz, and 20 MHz are supported.
The direct-conversion receiver has state-of-the-art noise figure
and linearity and requires no external components except a
balun. The complete RF subsystem integrates an autonomous
AGC loop and dc offset corrections, thus eliminating the need
for high speed interaction with the baseband processor. The
received signal strength indicator (RSSI) has over 80 dB of
dynamic range with 0.5 dB resolution and is accessible via the
serial interface.
The received signal is digitized with a high dynamic range
12-bit ADC. Decimation and channel filters produce a 10-bit
output signal at the appropriate sample rate determined by the
bandwidth mode. The transmit path takes 10-bit input data and
WiMAX RF
MxFE Transceiver
AD9352-5
FUNCTIONAL BLOCK DIAGRAM
AD9352-5
ADC
Rx TxNRx
ADC
DATA
Tx
RADIO
SWITCHING
DAC
SYNC
DAC
SYNC_VALID
GPO
CTRL
LDOs
CLK/LO
SYNTH
DATA
REF_XTAL
CTRL AUX_ADC AUXDAC
Figure 1.
interpolates it before converting it to the analog domain and
upconverting it to the carrier frequency.
The highly linear transmit path has excellent spectral purity
with sideband noise less than −134 dBm/Hz at 22 MHz offset
and offers an EVM of −33 dB at 0 dBm output power.
The reference frequency is produced by an internal crystal
oscillator with digital programmable frequency with 0.012 ppm
resolution, thus reducing the total bill of materials of the device.
An internal auxiliary ADC and two auxiliary DACs are
available for system monitoring and control. Three general-
purpose I/Os are also included and can be register programmed
or automatically sequenced by a user-defined state machine.
Mode control is available via a 4-wire serial port and four real-
time I/O control pins.
The AD9352-5 is powered from a single 3.3 V supply and
contains on-chip LDOs for each function to eliminate external
regulators. The AD9352-5 is packaged in a 9 mm × 9 mm,
64-lead LFCSP.
For more information on the AD9352-5, contact Analog Devices, Inc. at: [email protected].
Rev. Sp0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2008 Analog Devices, Inc. All rights reserved.

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