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CD4023C fiches techniques PDF

National Semiconductor - Triple 3-Input NAND(NOR) Gate

Numéro de référence CD4023C
Description Triple 3-Input NAND(NOR) Gate
Fabricant National Semiconductor 
Logo National Semiconductor 





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CD4023C fiche technique
February 1988
CD4023M CD4023C Triple 3-Input NAND Gate
CD4025M CD4025C Triple 3-Input NOR Gate
General Description
These triple gates are monolithic complementary MOS
(CMOS) integrated circuits constructed with N- and P-chan-
nel enhancement mode transistors All inputs are protected
against static discharge with diodes to VDD and VSS
Features
Y Wide supply voltage range
Y High noise immunity
Y 5V – 10V parametric ratings
Y Low power
3 0V to 15V
0 45 VDD (typ )
Connection Diagrams
CD4023M CD4023C
Dual-In-Line Packages
CD4025M CD4025C
Top View
TL F 5955 – 1
Order Number CD4023 or CD4025
Top View
TL F 5955 – 2
C1995 National Semiconductor Corporation TL F 5955
RRD-B30M105 Printed in U S A

PagesPages 6
Télécharger [ CD4023C ]


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