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PDF AD9878 Data sheet ( Hoja de datos )
| Número de pieza | AD9878 | |
| Descripción | Mixed-Signal Front End | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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FEATURES
Low cost 3.3 V CMOS MxFE™ for broadband applications
DOCSIS, EURO-DOCSIS, DVB, DAVIC compliant
232 MHz quadrature digital upconverter
12-bit direct IF DAC (TxDAC+®)
Up to 65 MHz carrier frequency DDS
Programmable sampling clock rates
Analog Tx output level adjust
Dual 12-bit, 29 MSPS direct IF ADCs with video clamp input
10-bit, 29 MSPS sampling ADC
8-bit ∑-∆ auxiliary DAC
Direct interface to AD832x family of PGA cable drivers
APPLICATIONS
Cable set-top boxes
Cable and wireless modems
Mixed-Signal Front End
for Broadband Applications
AD9878
TxID[5:0]
SDIO
IF10[4:0]
IF12[11:0]
FLAG[2:1]
FUNCTIONAL BLOCK DIAGRAM
I
Tx Q
16
12
SINC–1
DAC
Tx
DDS
4
CONTROL REGISTERS
MUX
10
12
ADC
ADC
MUX
12
ADC
Σ -∆
3
PLL
Σ-∆ OUTPUT
CA PORT
MCLK
OSCIN
IF10 INPUT
MUX
MUX
Σ
–
CLAMP
LEVEL
IF12B INPUT
VIDEO IN
IF12A INPUT
Figure 1.
GENERAL DESCRIPTION
The AD9878 is a single-supply, cable modem/set-top box,
mixed-signal front end. The device contains a transmit path
interpolation filter, a complete quadrature digital upconverter,
and a transmit DAC. The receive path contains dual 12-bit
ADCs and a 10-bit ADC. All internally required clocks and an
output system clock are generated by the phase-locked loop
(PLL) from a single crystal oscillator or clock input.
The transmit path interpolation filter provides an upsampling
factor of 16× with an output signal bandwidth up to 4.35 MHz.
Carrier frequencies up to 65 MHz with 26 bits of frequency tuning
resolution can be generated by the direct digital synthesizer
(DDS). The transmit DAC resolution is 12 bits and can run at
sampling rates as high as 232 MSPS. Analog output scaling from
0 dB to 7.5 dB in 0.5 dB steps is available to preserve SNR when
reduced output levels are required.
The 12-bit ADCs provide excellent undersampling performance,
allowing this device to typically deliver better than 10 ENOBs
with IF inputs up to 70 MHz. The 12-bit IF ADCs can sample at
rates up to 29 MHz, allowing them to process wideband signals.
The AD9878 includes a programmable ∑-∆ DAC, which can be
used to control an external component such as a variable gain
amplifier (VGA) or a voltage controlled tuner.
The AD9878 also integrates a CA port that enables a host
processor to interface with the AD832x family of programmable
gain amplifier (PGA) cable drivers or industry equivalent via
the MxFE serial port (SPORT).
The AD9878 is available in a 100-lead, LQFP package. The
AD9878 is specified over the extended industrial (−40°C to
+85°C) temperature range.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703 © 2005 Analog Devices, Inc. All rights reserved.
1 page  
AD9878
ELECTRICAL CHARACTERISTICS
VAS = 3.3 V ± 5%, VDS = 3.3 V ± 10%, fOSCIN = 27 MHz, fSYSCLK = 216 MHz, fMCLK = 54 MHz (M = 8), ADC clock derived from OSCIN,
RSET = 4.02 kΩ, maximum. Fine gain, 75 Ω DAC load.
Table 1.
PARAMETER
OSCIN and XTAL CHARACTERISTICS
Frequency Range
Duty Cycle
Input Impedance
MCLK Cycle-to-Cycle Jitter (fMCLK derived from PLL)
Tx DAC CHARACTERISTICS
Maximum Sample Rate
Resolution
Full-Scale Output Current
Gain Error (Using Internal Reference)
Offset Error
Reference Voltage (REFIO Level)
Differential Nonlinearity (DNL)
Integral Nonlinearity (INL)
Output Capacitance
Phase Noise @ 1 kHz Offset, 42 MHz Carrier
Output Voltage Compliance Range
Wideband SFDR
5 MHz Analog Output, IOUT = 10 mA
65 MHz Analog Output, IOUT = 10 mA
Narrow-Band SFDR (±1 MHz Window)
5 MHz Analog Output, IOUT = 10 mA
65 MHz Analog Output, IOUT = 10 mA
Tx MODULATOR CHARACTERISTICS
I/Q Offset
Pass-Band Amplitude Ripple (f < fIQCLK/8)
Pass-Band Amplitude Ripple (f < fIQCLK/4)
Stop-Band Response (f > fIQCLK × 3/4)
Tx GAIN CONTROL
Gain Step Size
Gain Step Error
Settling Time, 1% (Full-Scale Step)
10-BIT ADC CHARACTERISTICS
Resolution
Maximum Conversion Rate
Pipeline Delay
Analog Input
Input Voltage Range
Differential Input Impedance
Full Power Bandwidth
Dynamic Performance (AIN = −0.5 dBFS, f = 5 MHz)
Signal-to-Noise and Distortion (SINAD)
Effective Number of Bits (ENOB)
Total Harmonic Distortion (THD)
Spurious-Free Dynamic Range (SFDR)
Reference Voltage Error, REFT10 to REFB10 (1.0 V)
Temp Test Level Min
Full II
25°C II
25°C III
25°C III
3
35
Full II
N/A N/A
Full II
25°C I
25°C I
25°C I
25°C III
25°C III
25°C III
25°C III
Full II
232
4
−2.0
1.18
−0.5
Full II
Full II
62.4
50.3
Full II
Full II
71
61
Full II
Full II
Full II
Full II
50
25°C III
25°C III
25°C III
N/A N/A
Full II
N/A N/A
29
Full II
25°C III
25°C III
Full II
Full II
Full II
Full II
Full I
57.6
9.3
65.7
Typ
50
100||3
6
12
10
−1
±1.0
1.23
±2.5
±8
5
−110
68
53.5
74
64
55
0.5
<0.05
1.8
10
4.5
2
4||2
90
59.7
9.6
−71.1
72.4
±4
Max
29
65
20
+2.0
1.28
+1.5
±0.1
±0.5
−63
−63.6
±100
Unit
MHz
%
MΩ||pF
ps rms
MHz
Bits
mA
% FS
% FS
V
LSB
LSB
pF
dBc/Hz
V
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
µs
Bits
MHz
ADC cycles
VPPD
kΩ||pF
MHz
dB
Bits
dB
dB
mV
Rev. A | Page 4 of 36
5 Page 
AD9878
TYPICAL PERFORMANCE CHARACTERISTICS
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
0 2 4 6 8 10 12 14 16 18 20
FREQUENCY (MHz)
Figure 3. Dual-Sideband Spectral Plot, fC = 5 MHz, f = 1 MHz,
RSET = 10 kΩ (IOUT = 4 mA), RBW = 1 kHz
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
55 57 59 61 63 65 67 69 71 73 75
FREQUENCY (MHz)
Figure 6. Dual-Sideband Spectral Plot, fC = 65 MHz, f = 1 MHz,
RSET = 4 kΩ (IOUT = 10 mA), RBW = 1 kHz
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
0 2 4 6 8 10 12 14 16 18 20
FREQUENCY (MHz)
Figure 4. Dual-Sideband Spectral Plot, fC = 5 MHz, f = 1 MHz,
RSET = 4 kΩ (IOUT = 10 mA), RBW = 1 kHz
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
0
20 40 60 80 100
FREQUENCY (MHz)
Figure 7. Single Sideband @ 65 MHz, fC = 66 MHz,
f = 1 MHz, RSET = 10 kΩ (IOUT = 4 mA), RBW = 2 kHz
120
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
55 57 59 61 63 65 67 69 70 73
FREQUENCY (MHz)
Figure 5. Dual-Sideband Spectral Plot, fC = 65 MHz,
f = 1 MHz, RSET = 10 kΩ (IOUT = 4 mA), RBW = 1 kHz
75
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
0
20 40 60 80 100
FREQUENCY (MHz)
Figure 8. Single Sideband @ 65 MHz, fC = 66 MHz,
f = 1 MHz, RSET = 4 kΩ (IOUT = 10 mA), RBW = 2 kHz
120
Rev. A | Page 10 of 36
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AD9878.PDF ] | |
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