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PDF ADM2209E Data sheet ( Hoja de datos )

Número de pieza ADM2209E
Descripción Dual RS-232 Port
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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No Preview Available ! ADM2209E Hoja de datos, Descripción, Manual

a EMI-/EMC-Compliant ؎15 kV ESD Protected,
Dual RS-232 Port with Standby
ADM2209E
FEATURES
Two Complete Serial Ports, Six Drivers and Ten Receivers
Operates with 3 V or 5 V Logic
Low Power CMOS: <5 mA Operation
Low Standby Current: 100 A
460 kbit/s Data Rate Guaranteed Laplink®-Compatible
0.1 F Charge Pump Capacitors
Single +12 V Power Supply
+3.3 V/+5 V Standby Supply
One Receiver on Each Port Active in Standby
Complies with 89/336/EEC EMC Directive
ESD Protection to IEC1000-4-2 (801.2)
؎8 kV: Contact Discharge
؎15 kV: Air-Gap Discharge
؎15 kV: Human Body Model
Electrical Fast Transient (EFT) Immunity (IEC1000-4-4)
Low EMI Emissions (EN55022)
Eliminates Costly TransZorbs®
Conforms to EIA/TIA-232-E Specifications
Fail-Safe Receiver Outputs
APPLICATIONS
Personal Computers
Printers
Peripherals
Modems
GENERAL DESCRIPTION
The ADM2209E is a complete, dual RS-232 port on a single
chip, containing six drivers and ten receivers and fully meeting
EIA-232 and V.28 specifications. The device features an on-
board dc-to-dc converter to generate a –12 V power rail, elimi-
nating the need for a negative power supply.
The ADM2209E is suitable for operation in harsh electrical
environments and is compliant with the EU directive on EMC
(89/336/EEC). Both the level of emissions and immunity are in
compliance. EM immunity includes ESD protection in excess of
± 15 kV on all I-O lines (1000-4-2), Electrical Fast Transient
protection (1000-4-4) and Radiated Immunity (1000-4-3). EM
emissions include radiated and conducted emissions as required
by Information Technology Equipment EN55022, CISPR22.
The ADM2209E conforms to the EIA-232E and CCITT V.28
specifications and operates at data rates up to 460 kbps.
FUNCTIONAL BLOCK DIAGRAM
+12V
0.1F
VDD
V–
0.1F +
GND
T1INA
CMOS
INPUTS
T2INA
T3INA
R1OUTA
R2OUTA
CMOS
OUTPUTS
R3OUTA
R4OUTA
R5OUTA
CMOS
INPUTS
T1INB
T2INB
T3INB
R1OUTB
R2OUTB
CMOS
OUTPUTS
R3OUTB
R4OUTB
R5OUTB
CHARGE PUMP
VOLTAGE INVERTER
STBY
C+
+
0.1F
C–
3.3V/5V
0.1F
T1
T2
T3
R1
R2
R3
R4
R5
ADM2209E
T1
T2
T3
R1
R2
R3
R4
R5
T1OUTA
T2OUTA
EIA/TIA-232
OUTPUTS
T3OUTA
R1INA
R2INA
R3INA
R4INA
EIA/TIA-232
INPUTS
R5INA
T1OUTB
T2OUTB
EIA/TIA-232
OUTPUTS
T3OUTB
R1INB
R2INB
R3INB
R4INB
EIA / TIA -232
INPUTS
R5INB
In standby mode, one receiver on each port (R5) remains active
to allow monitoring of peripheral devices while the rest of the
system is in power-saving mode. This feature allows the
ADM2209E to wake up the system when a peripheral device
begins communication.
The ADM2209E is available in a 38-lead TSSOP package.
Laplink is a registered trademark of Traveling Software, Inc.
TransZorb is a registered trademark of General Semiconductor Industries, Inc.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1999

1 page




ADM2209E pdf
ADM2209E
Pin Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
Mnemonic
R5OUTA
R4OUTA
R3OUTA
R2OUTA
R1OUTA
T3INA
T2INA
T1INA
STBY
VDD
C+
T1INB
T2INB
T3INB
R1OUTB
R2OUTB
R3OUTB
R4OUTB
R5OUTB
R5INB
R4INB
R3INB
R2INB
R1INB
T3OUTB
T2OUTB
T1OUTB
GND
C–
V–
T1OUTA
T2OUTA
T3OUTA
R1INA
R2INA
R3INA
R4INA
R5INA
PIN FUNCTION DESCRIPTION
Function
Receiver Output (3.3 V/5 V TTL/CMOS Logic Levels)
Receiver Output (3.3 V/5 V TTL/CMOS Logic Levels)
Receiver Output (3.3 V/5 V TTL/CMOS Logic Levels)
Receiver Output (3.3 V/5 V TTL/CMOS Logic Levels)
Receiver Output (3.3 V/5 V TTL/CMOS Logic Levels)
Driver Input (3.3 V/5 V TTL/CMOS Logic Levels)
Driver Input (3.3 V/5 V TTL/CMOS Logic Levels)
Driver Input (3.3 V/5 V TTL/CMOS Logic Levels)
3.3 V/5 V Standby Power Supply for Receiver R5 in Ports A and B
Positive Power Supply, Nominally +12 V
Positive Terminal of C1 (If C1 is polarized capacitor.)
Driver Input (3.3 V/5 V TTL/CMOS Logic Levels)
Driver Input (3.3 V/5 V TTL/CMOS Logic Levels)
Driver Input (3.3 V/5 V TTL/CMOS Logic Levels)
Receiver Output (3.3 V/5 V TTL/CMOS Logic Levels)
Receiver Output (3 V/5 V TTL/CMOS Logic Levels)
Receiver Output (3.3 V/5 V TTL/CMOS Logic Levels)
Receiver Output (3.3 V/5 V TTL/CMOS Logic Levels)
Receiver Output (3.3 V/5 V TTL/CMOS Logic Levels)
Receiver Input (EIA-232 Signal Levels)
Receiver Input (EIA-232 Signal Levels)
Receiver Input (EIA-232 Signal Levels)
Receiver Input (EIA-232 Signal Levels)
Receiver Input (EIA-232 Signal Levels)
Driver Output (EIA-232 Signal Levels)
Driver Output (EIA-232 Signal Levels)
Driver Output (EIA-232 Signal Levels)
Ground Pin. Must Be Connected to 0 V
Negative Terminal of C1 (If C1 is polarized capacitor.)
Inverter Output (–12 V Nominal)–Terminal of C2 (If C2 is polarized capacitor.)
Driver Output (EIA-232 Signal Levels)
Driver Output (EIA-232 Signal Levels)
Driver Output (EIA-232 Signal Levels)
Receiver Input (EIA-232 Signal Levels)
Receiver Input (EIA-232 Signal Levels)
Receiver Input (EIA-232 Signal Levels)
Receiver Input (EIA-232 Signal Levels)
Receiver Input (EIA-232 Signal Levels)
–4– REV. 0

5 Page





ADM2209E arduino
ADM2209E
The ADM2209E is tested using both of the above-mentioned
test methods. All pins are tested with respect to all other pins as
per the MIL-STD-883B specification. In addition, all I-O pins
are tested as per the IEC test specification. The products were
tested under the following conditions:
(a) Power-On—Normal Operation
(b) Power-Off
There are four levels of compliance defined by IEC1000-4-2.
The ADM2209E meets the most stringent compliance level for
both contact and air-gap discharge. This means that the products
are able to withstand contact discharges in excess of 8 kV and air-
gap discharges in excess of 15 kV.
Table IV. IEC1000-4-2 Compliance Levels
Level
1
2
3
4
Contact Discharge
kV
2
4
6
8
Air Discharge
kV
2
4
8
15
Table V. ADM2209E ESD Test Results
ESD Test Method
MIL-STD-883B
IEC1000-4-2
Contact
Air
I-O Pins
± 15 kV
± 8 kV
± 15 kV
Other Pins
± 2.5 kV
FAST TRANSIENT BURST TESTING (IEC1000-4-4)
IEC1000-4-4 (previously 801-4) covers electrical fast-transient/
burst (EFT) immunity. Electrical fast transients occur as a
result of arcing contacts in switches and relays. The tests simu-
late the interference generated when, for example, a power relay
disconnects an inductive load. A spark is generated due to the
well-known back EMF effect. In fact the spark consists of a burst
of sparks as the relay contacts separate. The voltage appearing
on the line, therefore, consists of a burst of extremely fast tran-
sient impulses. A similar effect occurs when switching on fluo-
rescent lights.
The fast transient burst test defined in IEC1000-4-4 simulates
this arcing and its waveform is illustrated in Figure 26. It con-
sists of a burst of 2.5 kHz to 5 kHz transients repeating at
300 ms intervals. It is specified for both power and data lines.
V
Table VI.
Level
1
2
3
4
V Peak (kV)
PSU
0.5
1
2
4
V Peak (kV)
I-O
0.25
0.5
1
2
A simplified circuit diagram of the actual EFT generator is
illustrated in Figure 27.
HIGH
VOLTAGE
SOURCE
RC
CC
L RM CD
ZS
50
OUTPUT
Figure 27. IEC1000-4-4 Fast Transient Generator
The transients are coupled onto the signal lines using an EFT
coupling clamp. The clamp is 1 meter long and it completely
surrounds the cable, providing maximum coupling capacitance
(50 pF to 200 pF typ) between the clamp and the cable. High
energy transients are capacitively coupled onto the signal lines.
Fast rise times (5 ns) as specified by the standard result in very
effective coupling. This test is very severe since high voltages
are coupled onto the signal lines. The repetitive transients can
often cause problems where single pulses do not. Destructive
latch-up may be induced due to the high energy content of the
transients. Note that this stress is applied while the interface
products are powered up and transmitting data. The EFT test
applies hundreds of pulses with higher energy than ESD. Worst
case transient current on an I-O line can be as high as 40 A.
Test results are classified according to the following:
1. Normal performance within specification limits.
2. Temporary degradation or loss of performance which is self-
recoverable.
3. Temporary degradation or loss of function or performance
which requires operator intervention or system reset.
4. Degradation or loss of function which is not recoverable due
to damage.
The ADM2209E has been tested under worst case conditions
using unshielded cables and meets Classification 2. Data trans-
mission during the transient condition is corrupted, but it may
be resumed immediately following the EFT event without user
intervention.
5ns
V
300ms
15ms
t
50ns
t
0.2/ 0.4ms
Figure 26. IEC1000-4-4 Fast Transient Waveform
IEC1000-4-3 RADIATED IMMUNITY
IEC1000-4-3 (previously IEC801-3) describes the measure-
ment method and defines the levels of immunity to radiated
electromagnetic fields. It was originally intended to simulate the
electromagnetic fields generated by portable radio transceivers
or any other device that generates continuous wave radiated
electromagnetic energy. Its scope has since been broadened to
include spurious EM energy which can be radiated from fluores-
cent lights, thyristor drives, inductive loads, etc.
–10–
REV. 0

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